
REV. 0
–10–
AD9937
Table II. VTP Sequence System Register Map (Addr 0x14)
Bit
Breakdown
Bit
Width
Register
Name
Addr
Default
Function
VTP_Reg(0)
(11:0)
(23:12)
(31:24)
12
12
8
ENDADDRESS
STARTADDRESS
VTP_Reg_Addr
Sub Word End Address
Sub Word Start Address
System Register Address 0x14
VTP_Reg(1)
(8:0)
(17:9)
(26:18)
27
28
29
30
31
9
9
9
1
1
1
1
1
279
75
250
1
0
0
1
VTPLEN_0
V1TOG1_0
V1TOG2_0
V1POL_0
V2POL_0
V3POL_0
V4POL_0
Unused
VTP0: Length between Repetitions
VTP0: V1 Toggle Position 1
VTP0: V1 Toggle Position 2
VTP0: V1 Start Polarity
VTP0: V2 Start Polarity
VTP0: V3 Start Polarity
VTP0: V4 Start Polarity
VTP_Reg(2)
(8:0)
(17:9)
(26:18)
(31:27)
9
9
9
5
40
145
110
V2TOG1_0
V2TOG2_0
V3TOG1_0
Unused
VTP0: V2 Toggle Position 1
VTP0: V2 Toggle Position 2
VTP0: V3 Toggle Position 1
VTP_Reg(3)
(8:0)
(17:9)
(26:18)
(31:27)
9
9
9
5
215
5
180
V3TOG2_0
V4TOG1_0
V4TOG2_0
Unused
VTP0: V3 Toggle Position 2
VTP0: V4 Toggle Position 1
VTP0: V4 Toggle Position 2
VTP_Reg(4)
(8:0)
(17:9)
(26:18)
27
28
29
30
31
9
9
9
1
1
1
1
1
99
29
99
1
0
0
1
VTPLEN_1
V1TOG1_1
V1TOG2_1
V1POL_1
V2POL_1
V3POL_1
V4POL_1
Unused
VTP1: Length between Repetitions
VTP1: V1 Toggle Position 1
VTP1: V1 Toggle Position 2
VTP1: V1 Start Polarity
VTP1: V2 Start Polarity
VTP1: V3 Start Polarity
VTP1: V4 Start Polarity
VTP_Reg(5)
(8:0)
(17:9)
(26:18)
(31:27)
9
9
9
5
15
57
43
V2TOG1_1
V2TOG2_1
V3TOG1_1
Unused
VTP1: V2 Toggle Position 1
VTP1: V2 Toggle Position 2
VTP1: V3 Toggle Position 1
Table I. Control Register Map (continued)
Bit
Breakdown Width
Bit
Register
Name
Addr
Default
Function
8
0
(23:1)
0
(4:1)
(23:5)
0
(11:1)
12
(23:13)
(11:0)
(23:12)
1
23
1
4
19
1
11
1
11
12
12
0
MODE
Unused
SPEN
SPLOGIC
Unused
OFDEN
OFDNUM
TGEN
Unused
OFDHPTOG1
OFDHPTOG2
Mode Control Bit. (0 = Mode A, 1 = Mode B)
9
1
0x9
Single Pulse (SP) Output Enable.
Single Pulse Logic Setting (0 = OR, 1 = AND).
10
1
0x7FF
1
OFD Output Enable Control (0 = Disable, 1 = Enable).
Total Number of OFD Pulses per Field.
TG Output Enable Control (0 = Disable, 1 = Enable).
11
4095
4095
High Precision OFD Toggle Position 1.
High Precision OFD Toggle Position 2.
12
(9:0)
(23:10)
10
14
0x000
VGAGAIN
Unused
VGA Gain Control.
Denotes VD synchronous registers (control addresses 8, 9, 10, 11, and 12).