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參數資料
| 型號： | AD9937 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CCD Signal Processor with Precision Timing⑩ Generator |
| 中文描述： | CCD信號處理器精確定時⑩發生器 |
| 文件頁數： | 7/44頁 |
| 文件大小： | 410K |
| 代理商： | AD9937 |
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REV. 0
AD9937
–7–
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus, every
code must have a finite width. No missing codes guaranteed to
10-bit resolution indicates that all 1024 codes must be present
over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specification, refers to the
peak deviation of the output of the AD9937 from a true straight
line. The point used as zero scale occurs 1/2 LSB before the first
code transition. Positive full scale is defined as a level 1 1/2 LSB
beyond the last code transition. The deviation is measured from
the middle of each particular output code to the true straight line.
The error is then expressed as a percentage of the 2 V ADC full-
scale signal. The input signal is always appropriately gained up
to fill the ADC
’
s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage, using the relationship
=
(
1
2
LSB
ADC Full Scale
codes
N
)
where
N
is the bit resolution of the ADC. For the AD9937, 1 LSB
is 1.95 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. This represents a very high frequency disturbance on the
AD9937
’
s power supply. The PSR specification is calculated
from the change in the data outputs for a given step change in
the supply voltage.
EQUIVALENT CIRCUITS
R
AVDD
AVSS
AVSS
Figure 1. CCDIN
DVDD
DVSS
DRVSS
DRVDD
TRISTATEOUT
DATA
DOUT
Figure 2. Digital Data Outputs
330
DVDD
DVSS
Figure 3. Digital Inputs
HVDD1, HVDD2,
OR RSVDD
HVSS1, HVSS2,
OR RSVSS
ENABLE
RS,
H1 (A–D),
H2 (A, B)
OUTPUT
Figure 4. H1(A–D), H2(A, B), and RS Drivers
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9937BCPZ-24 | 制造商:Analog Devices 功能描述: |
| AD9937BCPZ-27 | 功能描述:IC CCD SIGNAL PROC/GEN 制造商:analog devices inc. 系列:* 零件狀態:上次購買時間 標準包裝:1 |
| AD9937BCPZRL-24 | 制造商:Analog Devices 功能描述: |
| AD9937BCPZRL-27 | 功能描述:IC CCD SIGNAL PROC/GEN 制造商:analog devices inc. 系列:* 零件狀態:上次購買時間 標準包裝:1 |
| AD9937KCP | 制造商:Analog Devices 功能描述:AFE Video 1ADC 10-Bit 3V 56-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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