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參數(shù)資料
型號(hào): AD9948
廠商: Analog Devices, Inc.
英文描述: 10-Bit CCD Signal Processor with Precision Timing⑩ Core
中文描述: 10位CCD信號(hào)處理器核心精確定時(shí)⑩
文件頁(yè)數(shù): 4/28頁(yè)
文件大小: 539K
代理商: AD9948
REV. 0
–4–
AD9948
TIMING SPECIFICATIONS
Parameter
Symbol
Min
Typ
Max
Unit
MASTER CLOCK (CLI) (See Figure 4)
CLI Clock Period
CLI High/Low Pulsewidth
Delay from CLI to Internal Pixel
Period Position
t
CLI
t
ADC
40
16
ns
ns
20
24
t
CLIDLY
t
COB
6
ns
CLPOB Pulsewidth (Programmable)
*
2
20
Pixels
SAMPLE CLOCKS (See Figure 6)
SHP Rising Edge to SHD Rising Edge
t
S1
17
20
ns
DATA OUTPUTS (See Figures 7a and 7b)
Output Delay From Programmed Edge
Pipeline Delay
t
OD
6
11
ns
Cycles
SERIAL INTERFACE
Maximum SCK Frequency
SL to SCK Setup Time
SCK to SL Hold Time
SDATA Valid to SCK Rising Edge Setup
SCK Falling Edge to SDATA Valid Hold
SCK Falling Edge to SDATA Valid Read
f
SCLK
t
LS
t
LH
t
DS
t
DH
t
DV
10
10
10
10
10
10
MHz
ns
ns
ns
ns
ns
*
Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp reference.
Specifications subject to change without notice.
(C
L
= 20 pF, f
CLI
= 25 MHz, Serial Timing in Figure 3, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS
*
With
Respect To
Parameter
Min
Max
Unit
AVDD, TCVDD
HVDD, RGVDD
DVDD, DRVDD
Any VSS
Digital Outputs
CLPOB/PBLK, HBLK
SCK, SL, SDATA
RG
H1–H4
REFT, REFB, CCDIN
Junction Temperature
Lead Temperature (10 sec)
AVSS
HVSS, RGVSS
DVSS, DRVSS
Any VSS
DRVSS
DVSS
DVSS
RGVSS
HVSS
AVSS
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
+3.9
+3.9
+3.9
+0.3
DRVDD + 0.3
DVDD + 0.3
DVDD + 0.3
RGVDD + 0.3
HVDD + 0.3
AVDD + 0.3
150
300
V
V
V
V
V
V
V
V
V
V
°
C
°
C
*
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
ORDERING GUIDE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9948 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Temperature
Range
–20
°
C to +85
°
C
–20
°
C to +85
°
C
–20
°
C to +85
°
C
Package
Description
Package
Option
Model
AD9948KCP
AD9948KCPRL
AD9948KCPZ
*
AD9948KCPZRL
*
–20
°
C to +85
°
C
LFCSP
LFCSP
LFCSP
LFCSP
CP-40
CP-40
CP-40
CP-40
*
This is a lead free product.
THERMAL CHARACTERISTICS
Thermal Resistance
40-Lead LFCSP Package
JA
= 27
°
C/W
*
*
is measured using a 4-layer PCB with the exposed paddle
soldered to the board.
相關(guān)PDF資料
PDF描述
AD9948KCP 10-Bit CCD Signal Processor with Precision Timing⑩ Core
AD9948KCPRL 10-Bit CCD Signal Processor with Precision Timing⑩ Core
AD9949KCP 12-Bit CCD Signal Processor with Precision Timing Core
AD9949 12-Bit CCD Signal Processor with Precision Timing Core
AD9949KCPZRL 12-Bit CCD Signal Processor with Precision Timing Core
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9948AKCPZ 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:
AD9948AKCPZRL 制造商:Analog Devices 功能描述:
AD9948KCP 制造商:Rochester Electronics LLC 功能描述:10 BIT 25 MSPS, 3V ANALOG FRONT END - Bulk 制造商:Analog Devices 功能描述:
AD9948KCPRL 制造商:Rochester Electronics LLC 功能描述:10 BIT 25 MSPS, 3V ANALOG FRONT END - Bulk 制造商:Analog Devices 功能描述:
AD9948KCPZ 功能描述:IC CCD SIGNAL PROCESSOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG,串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
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