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參數資料
| 型號： | ADF4360-7BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Integrated Synthesizer and VCO |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, QCC24 |
| 封裝： | 4 X 4 MM, MO-220-VGGD-2, LFCSP-24 |
| 文件頁數： | 19/20頁 |
| 文件大小： | 336K |
| 代理商： | ADF4360-7BCP |
PRELIMINARY TECHNICAL DATA
ADF4360-2
REV. PrA 07/03
–19–
OUTPUT MATCHING
There are a number of ways to match the output of the
ADF4360-2 for optimum operation. The most basic of these
is to use a 50Ohm resistor to Vvco. A DC bypass capacitor of
100pF is connected in series as shown below. Because the
resistor is not frequency dependent, This provides a good
broadband match. The output power in a circuit below gives
typically -6dBm output power into a 50Ohm load.
A better solution is to use a shunt inductor (acting as an RF
Choke) to Vvco, This gives a better match and hence more
output power, Additionally a series inductor is added after
the DC bypass capacitor to provide a resonant LC circuit.
This tunes the oscillator output and provides approximately
10dB further rejection of the 2nd harmonic. The shunt
inductor needs to be a relatively high value (>40nH).
Experiments have shown that the following circuit provides
an excellent match to 50Ohms over the operating range of the
ADF4360-2. This gives approximately -2dBm output power
across the frequency range of the ADF4360-2. Both single-
ended architectures can be examined using the
EVAL_ADF4360-2EB1 evaluation board.
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Figure 12. Simple ADF4360-2 Output Stage
Figure 13. Optimum ADF4360-2 Output Stage
If the user does not need differential outputs available on the
ADF4360, The user may either terminate the unused output,
or combine both outputs using a balun. The circuit below
shows how best to combine the outputs.
Figure 14. Balun for Combining ADF4360-2 RF Outputs
The above circuit is a lumped Lattice type LC balun. It is
designed for a centre frequency of 2.0GHz and outputs
+1.0dBm at this frequency. The series 2.2nH inductor is
used to tune out any parasitic capacitance due to the board
layout from each input, and the remainder of the circuit is
used to shift the output of one RF input by +90
o
, and the
second by -90
o
, thus combining the two. The action of the
3.6nH inductor and the 1.8pF capacitor accomplish this. The
47nH is used to provide an RF choke in order to feed the
supply voltage and the 10pF capacitor provides the necessary
DC block. To ensure good RF performance, Both of the
above circuits were implemented with Coilcraft 0402/0603
Inductors, and AVX 0402 thin-film Capacitors.
Alternatively, instead of the LC balun shown above, both
outputs may be combined using a 180 degrees rat-race
coupler.
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| ADF43607BCPZ | 制造商:ADI 功能描述:NEW |
| ADF4360-7BCPZ | 功能描述:IC SYNTHESIZER/VCO 24-LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
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