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參數資料
| 型號： | ADSP-21061L |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ADSP-2106x SHARC DSP Microcomputer Family |
| 中文描述： | 的ADSP - 2106x SHARC處理器DSP的微機家庭 |
| 文件頁數： | 17/47頁 |
| 文件大小： | 367K |
| 代理商： | ADSP-21061L |
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ADSP-21061/ADSP-21061L
–17–
REV. B
POWER DISSIPATION ADSP-21061L (3.3 V)
These specifications apply to the internal power portion of V
DD
only. See the Power Dissipation section of this data sheet for calcula-
tion of external supply current and total supply current. For a complete discussion of the code used to measure power dissipation,
see the technical note “SHARC Power Dissipation Measurements.”
Specifications are based on the following operating scenarios:
Operation
Peak Activity (I
DDINPEAK
)
High Activity (I
DDINHIGH
)
Low Activity (I
DDINLOW
)
Instruction Type
Multifunction
Multifunction
Single Function
Instruction Fetch
Cache
Internal Memory
Internal Memory
Core Memory Access
2 per Cycle (DM and PM)
1 per Cycle (DM)
None
Internal Memory DMA
1 per Cycle
1 per 2 Cycles
1 per 2 Cycles
To estimate power consumption for a specific application, use the following equation where % is the amount of time your program
spends in that state:
%
PEAK
×
I
DDINPEAK
+ %HIGH
×
I
DDINHIGH
+ %LOW
×
I
DDINLOW
+ %IDLE
×
I
DDIDLE
+ %IDLE16
×
I
DDIDLE16
= power consumption
Parameter
Test Conditions
Max
Unit
I
DDINPEAK
Supply Current (Internal)
1
t
CK
= 25 ns, V
DD
= max
t
CK
= 22.5 ns, V
DD
= max
t
CK
= 25 ns, V
DD
= max
t
CK
= 22.5 ns, V
DD
= max
t
CK
= 25 ns, V
DD
= max
t
CK
= 22.5 ns, V
DD
= max
V
DD
= max
V
DD
= max
480
535
380
425
220
245
180
50
mA
mA
mA
mA
mA
mA
mA
mA
I
DDINHIGH
Supply Current (Internal)
2
I
DDINLOW
Supply Current (Internal)
3
I
DDIDLE
I
DDIDLE16
Supply Current (Idle)
4
Supply Current (Idle16)
5
NOTES
1
The test program used to measure I
DDINPEAK
represents worst case processor operation and is not sustainable under normal application conditions. Actual internal
power measurements made using typical applications are less than specified.
2
I
DDINHIGH
is a composite average based on a range of high activity code.
3
I
DDINLOW
is a composite average based on a range of low activity code.
4
Idle denotes ADSP-21061L state during execution of IDLE instruction.
5
Idle16 denotes ADSP-21061L state during execution of IDLE16 instruction.
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| ADSP-21061KS-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21061KS-200 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21061LKB-160 | ADSP-2106x SHARC DSP Microcomputer Family |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-21061LAS-160 | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21061LAS-176 | 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 44MHz 44MIPS 240-Pin MQFP Tray 制造商:Analog Devices 功能描述:IC MICROCOMPUTER DSP |
| ADSP-21061LASZ-176 | 功能描述:IC DSP CONTROLLER 32BIT 240MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，FCBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21061LKB-160 | 功能描述:IC DSP CONTROLLER 32BIT 225BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21061LKB-176 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer Family |
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