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參數資料
| 型號： | ADSP-21160NCB-TBD |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩壓器的反向電流保護 |
| 文件頁數： | 14/53頁 |
| 文件大小： | 1680K |
| 代理商： | ADSP-21160NCB-TBD |
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog
Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
14
REV. PrB
For current information contact Analog Devices at 800/262-5643
ADSP-21160N
April 2002
PRELIMINARY TECHNICAL DATA
2
Applies to output and bidirectional pins: DATA63–0, ADDR31–0,
MS3–0
,
RDx
,
WRx
, PAGE, CLKOUT, ACK, FLAG3–0, TIMEXP,
HBG
, REDY,
DMAG1
,
DMAG2
,
BR6–1
,
PA
, BRST,
CIF
, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT3–0, LxCLK,
LxACK,
BMS
, TDO,
EMU
.
3
See
Output Drive Currents on page 46
for typical drive current capabilities.
4
Applies to input pins:
SBTS
,
IRQ2–0
,
HBR
,
CS
, ID2–0, RPBA, EBOOT, LBOOT, CLKIN,
RESET
, TCK, CLK_CFG3-0.
5
Applies to input pins with internal pull-ups: DR0, DR1.
6
Applies to input pins with internal pull-ups:
DMARx
, TMS, TDI,
TRST
.
7
Applies to three-statable pins: DATA63–0, ADDR31–0, PAGE, CLKOUT, ACK, FLAG3–0, REDY,
HBG
,
BMS
,
BR6–1
, TFSx, RFSx, TDO.
8
Applies to three-statable pins with internal pull-ups: DTx, TCLKx, RCLKx, EMU.
9
Applies to three-statable pins with internal pull-ups:
MS3–0
,
RDx
,
WRx
,
DMAGx
,
PA
,
CIF
.
10
Applies to three-statable pins with internal pull-downs: LxDAT7–0, LxCLK, LxACK.
11
Applies to ACK pulled up internally with 2 k
during reset or ID2–0 = 00x.
12
The test program used to measure I
DD-INPEAK
represents worst case processor operation and is not sustainable under normal application conditions. Actual
internal power measurements made using typical applications are less than specified.
For more information, see Power Dissipation on page 46.
13
I
DDINHIGH
is a composite average based on a range of high activity code.
For more information, see Power Dissipation on page 46.
14
I
DDINLOW
is a composite average based on a range of low activity code.
For more information, see Power Dissipation on page 46.
15
Idle denotes ADSP-21160N state during execution of IDLE instruction.
For more information, see Power Dissipation on page 46.
16
Characterized, but not tested.
17
Applies to all signal pins.
18
Guaranteed, but not tested.
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