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參數資料
| 型號： | ADSP-21160NKB-95 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 64-BIT, 47.5 MHz, OTHER DSP, PBGA400 |
| 封裝： | 27 X 27 MM, METRIC, PLASTIC, BGA-400 |
| 文件頁數： | 11/53頁 |
| 文件大小： | 1680K |
| 代理商： | ADSP-21160NKB-95 |
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog
Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
11
REV. PrB
For current information contact Analog Devices at 800/262-5643
ADSP-21160N
April 2002
PRELIMINARY TECHNICAL DATA
REDY
O (O/D)
Host Bus Acknowledge. The ADSP-21160N deasserts REDY (low) to add waitstates
to a host access when
CS
and
HBR
inputs are asserted.
DMA Request 1 (DMA Channel 11). Asserted by external port devices to request DMA
services.
DMAR1
has a 20k
internal pull-up resistor that is enabled on the
ADSP-21160N with ID2–0 = 00x.
DMA Request 2 (DMA Channel 12). Asserted by external port devices to request DMA
services.
DMAR2
has a 20k
internal pull-up resistor that is enabled on the
ADSP-21160N with ID2–0 = 00x.
Multiprocessing ID. Determines which multiprocessing bus request (
BR1
–
BR6
) is used
by ADSP-21160N. ID = 001 corresponds to
BR1
, ID = 010 corresponds to
BR2
, and
so on. Use ID = 000 or ID = 001 in single-processor systems. These lines are a system
configuration selection which should be hardwired or only changed at reset.
DMA Grant 1 (DMA Channel 11). Asserted by ADSP-21160N to indicate that the
requested DMA starts on the next cycle. Driven by bus master only.
DMAG1
has a
20k
internal pull-up resistor that is enabled on the ADSP-21160N with ID2–0 = 00x.
DMA Grant 2 (DMA Channel 12). Asserted by ADSP-21160N to indicate that the
requested DMA starts on the next cycle. Driven by bus master only.
DMAG2
has a
20k
internal pull-up resistor that is enabled on the ADSP-21160N with ID2–0 = 00x.
Multiprocessing Bus Requests. Used by multiprocessing ADSP-21160Ns to arbitrate
for bus mastership. An ADSP-21160N only drives its own
BRx
line (corresponding to
the value of its ID2–0 inputs) and monitors all others. In a multiprocessor system with
less than six ADSP-21160Ns, the unused
BRx
pins should be pulled high; the processor’s
own
BRx
line must not be pulled high or low because it is an output.
Rotating Priority Bus Arbitration Select. When RPBA is high, rotating priority for
multiprocessor bus arbitration is selected. When RPBA is low, fixed priority is selected.
This signal is a system configuration selection which must be set to the same value on
every ADSP-21160N. If the value of RPBA is changed during system operation, it must
be changed in the same CLKIN cycle on every ADSP-21160N.
Priority Access. Asserting its
PA
pin allows an ADSP-21160N bus slave to interrupt
background DMA transfers and gain access to the external bus.
PA
is connected to all
ADSP-21160Ns in the system. If access priority is not required in a system, the
PA
pin
should be left unconnected.
PA
has a 20k
internal pull-up resistor that is enabled on
the ADSP-21160N with ID2–0 = 00x.
Data Transmit (Serial Ports 0, 1). Each DT pin has a 50 k
internal pull-up resistor.
Data Receive (Serial Ports 0, 1). Each DR pin has a 50 k
internal pull-up resistor.
Transmit Clock (Serial Ports 0, 1). Each TCLK pin has a 50 k
internal pull-up resistor.
Receive Clock (Serial Ports 0, 1). Each RCLK pin has a 50 k
internal pull-up resistor.
Transmit Frame Sync (Serial Ports 0, 1).
Receive Frame Sync (Serial Ports 0, 1).
Link Port Data (Link Ports 0–5). Each LxDAT pin has a 50 k
internal pull-down
resistor that is enabled or disabled by the LPDRD bit of the LCTL0–1 register.
Link Port Clock (Link Ports 0–5). Each LxCLK pin has a 50 k
internal pull-down
resistor that is enabled or disabled by the LPDRD bit of the LCTL0–1 register.
Link Port Acknowledge (Link Ports 0–5). Each LxACK pin has a 50 k
internal
pull-down resistor that is enabled or disabled by the LPDRD bit of the LCOM register.
EPROM Boot Select. For a description of how this pin operates, see
Table 3
. This signal
is a system configuration selection that should be hardwired.
Link Boot. For a description of how this pin operates, see
Table 3
. This signal is a system
configuration selection that should be hardwired.
Boot Memory Select. Serves as an output or input as selected with the EBOOT and
LBOOT pins; see
Table 3
. This input is a system configuration selection that should be
hardwired.
DMAR1
I/A
DMAR2
I/A
ID2–0
I
DMAG1
O/T
DMAG2
O/T
BR6–1
I/O/S
RPBA
I/S
PA
I/O/T
DTx
DRx
TCLKx
RCLKx
TFSx
RFSx
LxDAT7–0
O
I
I/O
I/O
I/O
I/O
I/O
LxCLK
I/O
LxACK
I/O
EBOOT
I
LBOOT
I
BMS
I/O/T
Table 2. Pin Function Descriptions (Continued)
Pin
Type
Function
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-21160N | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| ADSP-21160NCB-TBD | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| ADSP-21161N | DSP Microcomputer |
| ADSP-21161NCCA-100 | DSP Microcomputer |
| ADSP-21161NKCA-100 | DSP Microcomputer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-21160NKB-X | 制造商:Analog Devices 功能描述: |
| ADSP-21160NKBZ-100 | 功能描述:IC DSP CONTROLLER 32BIT 400-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21161N | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-21161NCCA-100 | 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21161NCCAZ100 | 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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