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參數資料
型號: ADV7310
廠商: Analog Devices, Inc.
英文描述: Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
中文描述: 多格式視頻編碼器216兆赫六噪聲整形的12位DAC
文件頁數: 17/84頁
文件大小: 1099K
代理商: ADV7310
REV. A
ADV7310/ADV7311
–17–
WRITE
SEQUENCE
READ
SEQUENCE
S
SLAVE ADDR
A(S)
SUBADDR
A(S)
DATA
A(S)
DATA
A(S)
P
S
SLAVE ADDR
A(S)
SUBADDR
A(S) S
SLAVE ADDR
A(S)
DATA
DATA
A(M)
A
(M)
P
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A
(S) = NO-ACKNOWLEDGE BY SLAVE
A
(M) = NO-ACKNOWLEDGE BY MASTER
LSB = 0
LSB = 1
Figure 20. Read and Write Sequence
REGISTER ACCESSES
The MPU can write to or read from all of the registers of the
ADV7310/ADV7311 except the subaddress registers, which are
write only registers. The subaddress register determines which
register the next read or write operation accesses. All communi-
cations with the part through the bus start with an access to the
subaddress register. A read/write operation is then performed
from/to the target address, which increments to the next address
until a stop command is performed on the bus.
Register Programming
The following tables describe the functionality of each register.
All registers can be read from as well as written to, unless other-
wise stated.
Subaddress Register (SR7–SR0)
The communications register is an 8-bit write only register. After
the part has been accessed over the bus and a read/write opera-
tion is selected, the subaddress is set up. The subaddress register
determines to/from which register the operation takes place.
相關PDF資料
PDF描述
ADV7310KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7312 Multiformat 11-Bit HDTV Video Encoder
ADV7312KST Multiformat 11-Bit HDTV Video Encoder
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