- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374047 > ADV7310 (Analog Devices, Inc.) Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs PDF資料下載
參數(shù)資料
| 型號(hào)： | ADV7310 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| 中文描述： | 多格式視頻編碼器216兆赫六噪聲整形的12位DAC |
| 文件頁(yè)數(shù)： | 25/84頁(yè) |
| 文件大小： | 1099K |
| 代理商： | ADV7310 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)當(dāng)前第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)
REV. A
ADV7310/ADV7311
–25–
SR7–
SR0
44h
Register
SD Mode
Register 3
Bit Description
SD VSYNC-3H
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
Register Setting
Disabled
VSYNC
= 2.5 lines [PAL]
VSYNC
= 3 lines [NTSC]
Genlock disabled
Subcarrier Reset
Timing Reset
RTC enabled
720 pixels
710 [NTSC]/702[PAL]
Chroma enabled
Chroma disabled
Enabled
Disabled
Disabled
Enabled
DAC A = Luma, DAC B =
Chroma
DAC A = Chroma, DAC B =
Luma
Reset
Values
00h
SD RTC/TR/SCR
0
0
1
1
0
1
0
1
SD Active Video Length
0
1
SD Chroma
0
1
SD Burst
0
1
SD Color Bars
0
1
SD DAC Swap
0
1
45h
46h
47h
Reserved
Reserved
SD Mode
Register 4
00h
00h
00h
SD PrPb Scale
0
1
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
0 must be written to this bit
0 must be written to this bit
0 must be written to this bit
SD Y Scale
0
1
SD Hue Adjust
0
1
SD Brightness
0
1
SD Luma SSAF Gain
0
1
Reserved
Reserved
Reserved
Reserved
0
0
0
48h
0
00h
Reserved
SD Double Buffering
0
0 must be written to this bit
Disabled
Enabled
8-bit Input
16-bit Input
10-bit Input
20-bit Input
Disabled
Enabled
Disabled
Enabled
Gamma Curve A
Gamma Curve B
Disabled
– 11 IRE
– 6 IRE
– 1.5 IRE
0 must be written to this bit
Disabled
Enabled
Disabled
4 clk cycles
8 clk cycles
Reserved
0 must be written to this bit
0 must be written to this bit
0
1
SD Input Format
0
0
1
1
0
1
0
1
SD Digital Noise Reduction
0
1
SD Gamma Control
0
1
SD Gamma Curve
0
1
49h
SD Undershoot Limiter
0
0
1
1
0
1
0
1
00h
Reserved
SD Black Burst Output on DAC
Luma
0
0
1
SD Chroma Delay
0
0
1
1
0
1
0
1
Reserved
Reserved
0
0
SD Mode
Register 5
SD Mode
Register 6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7310KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7312 | Multiformat 11-Bit HDTV Video Encoder |
| ADV7312KST | Multiformat 11-Bit HDTV Video Encoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV73105805 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106601 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106602 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106912 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73107005 | 制造商:LG Corporation 功能描述:Frame Assembly |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。