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參數(shù)資料
| 型號： | ADV7310 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| 中文描述： | 多格式視頻編碼器216兆赫六噪聲整形的12位DAC |
| 文件頁數(shù)： | 62/84頁 |
| 文件大小： | 1099K |
| 代理商： | ADV7310 |
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REV. A
–62–
ADV7310/ADV7311
APPENDIX 3—SD CLOSED CAPTIONING
[Subaddress 51h–54h]
The ADV7310/ADV7311 support closed captioning conforming
to the standard television synchronizing waveform for color
transmission. Closed captioning is transmitted during the blanked
active line time of Line 21 of the odd fields and Line 284 of the
even fields.
Closed captioning consists of a 7-cycle sinusoidal burst that is
frequency and phase locked to the caption data. After the clock
run-in signal, the blanking level is held for two data bits and is
followed by a Logic 1 start bit. Sixteen bits of data follow the
start bit. These consist of two 8-bit bytes, seven data bits, and
one odd parity bit. The data for these bytes is stored in the SD
closed captioning registers [Address 53h–54h].
The ADV7310/ADV7311 also support the extended closed
captioning operation, which is active during even fields and is
encoded on Scan Line 284. The data for this operation is stored
in the SD closed captioning registers [Address 51h–52h].
All clock run-in signals and timing to support closed captioning
on Lines 21 and 284 are generated automatically by the ADV7310/
ADV7311. All pixels inputs are ignored during Lines 21 and
284 if closed captioning is enabled.
FCC Code of Federal Regulations (CFR) 47 section 15.119
and EIA608 describe the closed captioning information for
Lines 21 and 284.
The ADV7310/ADV7311 use a single buffering method. This
means that the closed captioning buffer is only 1-byte deep;
therefore there will be no frame delay in outputting the closed
captioning data unlike other 2-byte deep buffering systems. The
data must be loaded one line before (Line 20 or Line 283) it is
output on Line 21 and Line 284. A typical implementation of this
method is to use
VSYNC
to interrupt a microprocessor, which
in turn will load the new data (two bytes) in every field. If no
new data is required for transmission, 0s must be inserted in
both data registers; this is called
nulling
. It is also important to
load control codes, all of which are double bytes on Line 21, or
a TV will not recognize them. If there is a message like “Hello
World” that has an odd number of characters, it is important to
pad it out to even in order to get “end of caption” 2-byte control
code to land in the same field.
S
T
A
R
T
P
A
R
I
T
Y
P
A
R
I
T
Y
D0–D6
D0–D6
10.5
0.25 s
12.91 s
7 CYCLES OF
0.5035MHz
CLOCK RUN-IN
REFERENCE COLOR BURST
(9 CYCLES)
FREQUENCY = F
= 3.579545MHz
AMPLITUDE = 40 IRE
10.003 s
50 IRE
40 IRE
27.382 s
33.764 s
BYTE 1
BYTE 0
TWO 7-BIT + PARITY
ASCII CHARACTERS
(DATA)
Figure 67. Closed Captioning Waveform, NTSC
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7310KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7312 | Multiformat 11-Bit HDTV Video Encoder |
| ADV7312KST | Multiformat 11-Bit HDTV Video Encoder |
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|---|---|
| ADV73105805 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106601 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106602 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73106912 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73107005 | 制造商:LG Corporation 功能描述:Frame Assembly |
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