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參數資料
型號: EFM32-TG222F32-SK
廠商: Energy Micro
文件頁數: 72/136頁
文件大小: 0K
描述: IC MICRO KIT GECKO 48LQFP
標準包裝: 1
系列: Tiny Gecko
套件類型: 微控制器
值: 2 件 - 閃存 - 32KB
包裝: 紙板盒
安裝類型: 表面貼裝
包括封裝: 48-LQFP
其它名稱: 914-1021
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
40
www.energymicro.com
directly by the instructions ASR, LSR, LSL, ROR, and RRX, and the result is written to a destination
register
during the calculation of Operand2 by the instructions that specify the second operand as a register
with shift, see Section 3.3.3 (p. 38) . The result is used by the instruction.
The permitted shift lengths depend on the shift type and the instruction, see the individual instruction
description or Section 3.3.3 (p. 38) . If the shift length is 0, no shift occurs. Register shift operations
update the carry flag except when the specified shift length is 0. The following sub-sections describe
the various shift operations and how they affect the carry flag. In these descriptions, Rm is the register
containing the value to be shifted, and n is the shift length.
3.3.4.1 ASR
Arithmetic shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places,
into the right-hand 32-n bits of the result. And it copies the original bit[31] of the register into the left#hand
n
bits of the result. See Figure 3.1 (p. 40) .
You can use the ASR #n operation to divide the value in the register Rm by 2
n, with the result being
rounded towards negative-infinity.
When the instruction is ASRS or when ASR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.
If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.
Figure 3.1. ASR #3
31
1 0
Carry
Flag
...
2
3
4
5
3.3.4.2 LSR
Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into
the right-hand 32-n bits of the result. And it sets the left#hand n bits of the result to 0. See Figure 3.2 (p.
You can use the LSR #n operation to divide the value in the register Rm by 2
n, if the value is regarded
as an unsigned integer.
When the instruction is LSRS or when LSR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are cleared to 0.
If n is 33 or more and the carry flag is updated, it is updated to 0.
相關PDF資料
PDF描述
EFM32-TG230F32-SK IC MICRO KIT GECKO 64QFN
EFM32-TG210F32-SK IC MICRO KIT GECKO 32QFN
1267 X 6" TAPE ALUMINUM FOIL 6" X 1FT
7810 0.25MM ECAP COND PAD .25MM 7.7" X 10"
7810 0.20MM ECAP COND PAD .20MM 7.7" X 10"
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