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參數(shù)資料
型號： EFM32-TG822F32-SK
廠商： Energy Micro
文件頁數(shù)： 5/136頁
文件大小： 0K
描述： IC MICRO KIT GECKO 48LQFP
標(biāo)準(zhǔn)包裝： 1
系列： Tiny Gecko
套件類型： 微控制器
值： 2 件 - 閃存 - 32KB
包裝： 紙板盒
安裝類型： 表面貼裝
包括封裝： 48-LQFP
其它名稱： 914-1023
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
102
www.energymicro.com
Bits
Name
Function
On exception entry, the processor uses bit[9] of the stacked PSR to indicate the
stack alignment. On return from the exception it uses this stacked bit to restore the
correct stack alignment.
[8]
BFHFNMIGN
Enables handlers with priority -1 or -2 to ignore data bus faults caused by load and
store instructions. This applies to the hard fault, NMI, and FAULTMASK escalated
handlers:
0 = data bus faults caused by load and store instructions cause a lock-up
1 = handlers running at priority -1 and -2 ignore data bus faults caused by load and
store instructions.
Set this bit to 1 only when the handler and its data are in absolutely safe memory.
The normal use of this bit is to probe system devices and bridges to detect control
path problems and fix them.
[7:5]
-
Reserved.
[4]
DIV_0_TRP
Enables faulting or halting when the processor executes an SDIV or UDIV
instruction with a divisor of 0:
0 = do not trap divide by 0
1 = trap divide by 0.
When this bit is set to 0,a divide by zero returns a quotient of 0.
[3]
UNALIGN_TRP
Enables unaligned access traps:
0 = do not trap unaligned halfword and word accesses1 = trap unaligned halfword
and word accesses.
If this bit is set to 1, an unaligned access generates a usage fault.
Unaligned LDM, STM, LDRD, and STRD instructions always fault irrespective of
whether UNALIGN_TRP is set to 1.
[2]
-
Reserved.
[1]
USERSETMPEND
Enables unprivileged software access to the STIR, see Section 4.2.8 (p. 93) :
0 = disable1 = enable.
[0]
NONEBASETHRDENA
Indicates how the processor enters Thread mode:
0 = processor can enter Thread mode only when no exception is active.
1 = processor can enter Thread mode from any level under the control of an
EXC_RETURN value, see Section 2.3.7.2 (p. 27) .
4.3.9 System Handler Priority Registers
The SHPR1-SHPR3 registers set the priority level, 0 to 7 of the exception handlers that have configurable
priority.
SHPR1-SHPR3 are byte accessible. See the register summary in Table 4.12 (p. 94) for their
attributes.
The system fault handlers and the priority field and register for each handler are:
Table 4.21. System fault handler priority fields
Handler
Field
Register description
Memory management fault
PRI_4
Bus fault
PRI_5
Usage fault
PRI_6
SVCall
PRI_11
PendSV
PRI_14
相關(guān)PDF資料
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EFM32-TG222F32-SK IC MICRO KIT GECKO 48LQFP
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1267 X 6" TAPE ALUMINUM FOIL 6" X 1FT
7810 0.25MM ECAP COND PAD .25MM 7.7" X 10"
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EFM32TG822F32-T 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 32KB FLASH 48TQFP
EFM32TG822F8 功能描述:ARM微控制器 - MCU 8KB Flash 2KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
EFM32TG822F8-QFP48 制造商:Energy Micro AS 功能描述:TINY GECKO MCU - Tape and Reel 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 48TQFP
EFM32TG822F8-QFP48T 制造商:Energy Micro AS 功能描述:32 BIT ARM MPU, TINY GECKO - Trays
EFM32TG822F8-QFP48-T 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 48TQFP
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