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參數(shù)資料
| 型號： | EFM32-TG822F32-SK |
| 廠商： | Energy Micro |
| 文件頁數(shù)： | 72/136頁 |
| 文件大小： | 0K |
| 描述： | IC MICRO KIT GECKO 48LQFP |
| 標準包裝： | 1 |
| 系列： | Tiny Gecko |
| 套件類型： | 微控制器 |
| 值： | 2 件 - 閃存 - 32KB |
| 包裝： | 紙板盒 |
| 安裝類型： | 表面貼裝 |
| 包括封裝： | 48-LQFP |
| 其它名稱： | 914-1023 |
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
40
www.energymicro.com
directly by the instructions ASR, LSR, LSL, ROR, and RRX, and the result is written to a destination
register
during the calculation of Operand2 by the instructions that specify the second operand as a register
with shift, see Section 3.3.3 (p. 38) . The result is used by the instruction.
The permitted shift lengths depend on the shift type and the instruction, see the individual instruction
description or Section 3.3.3 (p. 38) . If the shift length is 0, no shift occurs. Register shift operations
update the carry flag except when the specified shift length is 0. The following sub-sections describe
the various shift operations and how they affect the carry flag. In these descriptions, Rm is the register
containing the value to be shifted, and n is the shift length.
3.3.4.1 ASR
Arithmetic shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places,
into the right-hand 32-n bits of the result. And it copies the original bit[31] of the register into the left#hand
n
bits of the result. See Figure 3.1 (p. 40) .
You can use the ASR #n operation to divide the value in the register Rm by 2
n, with the result being
rounded towards negative-infinity.
When the instruction is ASRS or when ASR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.
If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.
Figure 3.1. ASR #3
31
1 0
Carry
Flag
...
2
3
4
5
3.3.4.2 LSR
Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into
the right-hand 32-n bits of the result. And it sets the left#hand n bits of the result to 0. See Figure 3.2 (p.
41) .
You can use the LSR #n operation to divide the value in the register Rm by 2
n, if the value is regarded
as an unsigned integer.
When the instruction is LSRS or when LSR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are cleared to 0.
If n is 33 or more and the carry flag is updated, it is updated to 0.
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相關(guān)代理商/技術(shù)參數(shù) |
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| EFM32TG822F32-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 32KB FLASH 48TQFP |
| EFM32TG822F8 | 功能描述:ARM微控制器 - MCU 8KB Flash 2KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| EFM32TG822F8-QFP48 | 制造商:Energy Micro AS 功能描述:TINY GECKO MCU - Tape and Reel 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 48TQFP |
| EFM32TG822F8-QFP48T | 制造商:Energy Micro AS 功能描述:32 BIT ARM MPU, TINY GECKO - Trays |
| EFM32TG822F8-QFP48-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 48TQFP |
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