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參數資料
| 型號： | EPF10K70RC240-4 |
| 廠商： | Altera |
| 文件頁數： | 74/128頁 |
| 文件大小： | 0K |
| 描述： | IC FLEX 10K FPGA 70K 240-RQFP |
| 產品培訓模塊： | Three Reasons to Use FPGA's in Industrial Designs |
| 產品變化通告： | Package Change 30/Jun/2010 |
| 標準包裝： | 24 |
| 系列： | FLEX-10K® |
| LAB/CLB數： | 468 |
| 邏輯元件/單元數： | 3744 |
| RAM 位總計： | 18432 |
| 輸入/輸出數： | 189 |
| 門數： | 118000 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 240-BFQFP 裸露焊盤 |
| 供應商設備封裝： | 240-RQFP（32x32） |
| 其它名稱： | 544-2244 |
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Altera Corporation
5
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
FLEX 10K and FLEX 10KA device package types include plastic J-lead chip carrier (PLCC), thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), power quad flat pack (RQFP), ball-grid array (BGA), pin-grid array (PGA),
and FineLine BGATM packages.
(2)
This option is supported with a 256-pin FineLine BGA package. By using SameFrame pin migration, all FineLine
BGA packages are pin compatible. For example, a board can be designed to support both 256-pin and 484-pin
FineLine BGA packages. The Altera software automatically avoids conflicting pins when future migration is set.
General
Description
Altera’s FLEX 10K devices are the industry’s first embedded PLDs. Based
on reconfigurable CMOS SRAM elements, the Flexible Logic Element
MatriX (FLEX) architecture incorporates all features necessary to
implement common gate array megafunctions. With up to 250,000 gates,
the FLEX 10K family provides the density, speed, and features to integrate
entire systems, including multiple 32-bit buses, into a single device.
FLEX 10K devices are reconfigurable, which allows 100
% testing prior to
shipment. As a result, the designer is not required to generate test vectors
for fault coverage purposes. Additionally, the designer does not need to
manage inventories of different ASIC designs; FLEX 10K devices can be
configured on the board for the specific functionality required.
Table 6 shows FLEX 10K performance for some common designs. All
performance values were obtained with Synopsys DesignWare or LPM
functions. No special design technique was required to implement the
applications; the designer simply inferred or instantiated a function in a
Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or
schematic design file.
Notes:
(1)
The speed grade of this application is limited because of clock high and low specifications.
(2)
This application uses combinatorial inputs and outputs.
(3)
This application uses registered inputs and outputs.
Table 6. FLEX 10K & FLEX 10KA Performance
Application
Resources
Used
Performance
Units
LEs
EABs
-1 Speed
Grade
-2 Speed
Grade
-3 Speed
Grade
-4 Speed
Grade
16-bit loadable
counter (1)
16
0
204
166
125
95
MHz
16-bit accumulator (1)
16
0
204
166
125
95
MHz
16-to-1 multiplexer (2)
10
0
4.2
5.8
6.0
7.0
ns
256
× 8 RAM read
cycle speed (3)
0
1
172
145
108
84
MHz
256
× 8 RAM write
cycle speed (3)
01
106
89
68
63
MHz
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| EPF10K70RC240-4N | 功能描述:FPGA - 現場可編程門陣列 FPGA - Flex 10K 468 LABs 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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