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參數(shù)資料
| 型號： | FAN5068DDR |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | FAN5068 Component calculation and simulation tools |
| 中文描述： | FAN5068組件的計算和模擬工具 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大小： | 159K |
| 代理商： | FAN5068DDR |
PRODUCT SPECIFICATION
FAN5068
4
REV. 1.0.1 9/9/04
Figure 3. VTT Regulator Block Diagram
Pin Configuration
FAN5068MP 5x5 mm MLP-24 Package (
θ
JA
= 38°C/W,
θ
JC
= 1.4°C/W)*
Note: Connect P1 pad to GND.
Pin Definitions
Pin #
1
2
Pin Name
G1.2
FB1.2
Pin Function Description
. Turned off (low) in S3 and S5 modes.
. Tie to a voltage higher than 0.9V to disable this
Gate Drive
Feedback for the 1.2V LDO Output
regulator.
Standby Switch
. Drives the P-Channel MOSFET to power 5V DUAL from 5VSB when in
S3. Goes high in S0 and S5.
5V MAIN
. When this pin is below 4.5V, transition from S3 to S0 is inhibited.
VTT Remote Sense Input
.
VTT Regulator Power Output
.
VDDQ Input from PWM
. Connect to PWM output voltage. This is the VTT Regulator power
input.
for the 1.2V LDO
3
SBSW
4
5
6
7
5V MAIN
VTT SNS
VTT OUT
VDDQ IN
VTT SNS
VTT OUT
–
+
EN
S3
VDDQ IN
PGND
REF IN
VDDQ IN
50K
50K
R9
R10
7
8
9
10
11
12
24
23
22
21
20
19
EN
S3#I
S3#O
3.3 ALW
VCC
PGOOD
1
2
3
4
5
6
18
17
16
15
14
13
G1.2
FB1.2
SBSW
5V MAIN
VTT SNS
VTT OUT
P1 = GND
V
B
H
S
I
L
R
F
C
S
I
G
*Test method as per JEDEC Specification JESD51-5
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FAN5068MPX | 功能描述:電流型 PWM 控制器 DDR-1/DDR-2 plus ACPI Regulator Combo RoHS:否 制造商:Texas Instruments 開關頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| FAN5069 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069_06 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PWM and LDO Controller Combo |
| FAN5069B_BAC3116B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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