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參數(shù)資料
| 型號： | FAN5068DDR |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | FAN5068 Component calculation and simulation tools |
| 中文描述： | FAN5068組件的計算和模擬工具 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大小： | 159K |
| 代理商： | FAN5068DDR |
PRODUCT SPECIFICATION
FAN5068
6
REV. 1.0.1 9/9/04
Absolute Maximum Ratings
Absolute maximum ratings are the values beyond which the device may be damaged or have its useful life
impaired. Functional operation under these conditions is not implied.
Recommended Operating Conditions
Parameter
VCC
BOOT, SW, ISNS, HDRV, S3#O
BOOT to SW
All Other Pins
Junction Temperature (T
Storage Temperature
Lead Soldering Temperature, 10 seconds
I(VTT) Peak (Duration < 2ms)
I(VTT) RMS
Min.
Typ.
Max.
6.5
28
6.5
VCC+0.3
150
150
300
1.5
1
Units
V
V
V
V
°C
°C
°C
A
A
–0.3
–20
–65
J
)
Parameter
Supply Voltage VCC
I(3.3 ALW)
Ambient Temperature (T
Conditions
Min.
4.5
Typ.
5
Max.
5.5
1.25
85
Units
V
A
°C
A
)
–10
Electrical Specifications
Recommended operating conditions, component values per Figure 1 unless otherwise noted.
Parameter
Power Supplies
VCC Current:
Conditions
Min.
Typ.
Max.
Units
S0
LDRV, HDRV Open, FB forced above
regulation point, I(VTT) = 0, EN = 1, S3#I = 1
EN = 1, S3#I = LOW, I(3.3) < 10mA
EN = 0, I(3.3) = 0
Rising VCC
Falling
Hysteresis
Rising
Falling
Hysteresis
15
24
mA
S3
S5
15
2
4.2
4.05
0.150
4.4
4.1
0.300
24
4
4.4
4.2
mA
mA
V
V
V
V
V
V
VCC UVLO Threshold
4.0
3.9
5V MAIN UVLO Threshold
4.3
3.9
4.6
4.2
Oscillator
Frequency
Ramp Amplitude, pk–pk
Ramp Offset
Reference and Soft Start
Internal Reference Voltage
Soft Start current (I
255
300
1.8
0.5
345
kHz
V
V
0.891
0.900
4.5
48
150
0.909
V
μA
SS
)
Initial ramp after power-up
During PWM / LDO soft start
EN = 0
SS Discharge on-resistance
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