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參數資料
| 型號： | FAN5068DDR |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | FAN5068 Component calculation and simulation tools |
| 中文描述： | FAN5068組件的計算和模擬工具 |
| 文件頁數： | 7/18頁 |
| 文件大小： | 159K |
| 代理商： | FAN5068DDR |
FAN5068
PRODUCT SPECIFICATION
REV. 1.0.1 9/9/04
7
SS Complete Threshold
SS Complete Hysteresis
PWM Converter
Load Regulation
FB Bias Current
Under-Voltage Shutdown
1.5
50
V
mV
I
OUT
from 0 to 16A
–2
0.75
65
+2
1.25
80
%
μA
%
1
As % of set point.
2μs noise filter
R
ILIM
= 56k
As % of set point
75
I
Over-Voltage threshold
PWM Output Driver
HDRV Output Resistance
SNS
Over-Current threshold
145
110
170
115
195
120
μA
%
Sourcing
Sinking
Sourcing
Sinking
1.8
1.8
1.8
1.2
3
3
3
2
LDRV Output Resistance
PGOOD (Power Good Output) and Control pins. VDDQ output
Lower Threshold
Upper Threshold
PGOOD Output Low
Leakage Current
VTT Regulator
VDDQ IN Current
VREF IN to VTT
Differential Output Voltage
Internal Divider Gain
VTT Current limit
VTT Leakage Current
VTT SNS input resistance
VTT PGOOD
As % of set point, 2μs noise filter
As % of set point, 2μs noise filter
I
PGOOD
= 1.5mA
V
PULLUP
= 5V
86
108
92
115
0.5
1
%
%
V
μA
S0 mode, I
I
VTT
= 0, T
I
VTT
= ± 1.25A (pulsed)
VTT
= 25°C
= 0
35
70
20
40
mA
mV
A
–20
–40
0.493
±1.5
–20
0.498
±3
0.503
±4
20
V/V
A
mA
k
% VTT
REF
V
Pulsed (300ms max.), T
S3#I = LOW
VTT = 0.9V
Measured at VTT SNS
A
= 25°C
110
80
110
Drop-Out Voltage
1.2V LDO
Regulation
Drop-Out Voltage
External Gate Drive
Gate Drive Source Current
Gate Drive Sink Current
External Gate Drive
FB1.2 PGOOD threshold
3.3V LDO
Regulation
Drop-Out Voltage
ITT = ± 1.5A
–0.8
0.8
I(1.2) from 0 to 5A
I(1.2)
≤
5A, R
VCC = 4.75V
1.17
1.2
1.23
0.3
4.5
V
V
V
DS(ON)
< 50m
1.2
1.2
mA
mA
V
V
VCC = 4.75V
4.5
0.80
I(3.3) from 0 to 1.25A, VCC > 4.75V
I(3.3)
≤
1.25A
3.2
3.3
3.4
1.5
V
V
Electrical Specifications
(continued)
Recommended operating conditions, component values per Figure 1 unless otherwise noted.
Parameter
Conditions
Min.
Typ.
Max.
Units
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