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參數資料
| 型號： | HM17CM256 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 顯示驅動器 |
| 英文描述： | 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC580 |
| 封裝： | 19.75 X 2.39 MM, GOLD BUMP, DIE-580 |
| 文件頁數： | 18/111頁 |
| 文件大小： | 2094K |
| 代理商： | HM17CM256 |
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HM17CM256
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(3) Read out of internal register
Read out is possible not only from DDRAM, but also from the internal register. Addresses for
read (0~F
H
) are allocated in each register.
Read out is executed after writing read-out register address to internal register.
Internal register read out sequence
When register is read out, upper 4 bit data are “1111”.
Non-used bits of active registers are “0”.
When non-used registers are read out, upper 4 bits are “1111” and lower 4 bits are “0000”.
(4) 16 bit data access to DDRAM
It is possible to write in DDRAM by 16-bits access with the data of 16 bits data bus D
0
~D
15
.
16 bits data access mode is possible by setting the value of WLS register to “1”.
TABEL
WLS
Acess mode
L
8 bit
H
16 bit
Each command should be set to 8-bits(D
0
~D
7
) as well as to 16-bit access mode.
16-bit access is available at display RAM access.
(5) Display start line register
When displaying the DDRAM data, it is the contents of Y address register that is corresponding to
display start line.
The data of Y address is displayed on the display start line depending on the value of the shift
command register and the display start line register.
The data of this register are preset to the display line counter per FLM signal transition.
Line counter is counted up in synchronization with CL input and generates line address that read
out 384bit data from DDRAM to LCD driver circuit.
D
0
~D
7
M
N
WR
Address set
for
register read
Internal
register read
Address set
for
register read
Internal
register read
m
n
RD
RE register set:100
Internal register read address set
set RE of register to be read out
Internal register read
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