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參數資料
| 型號： | HM6P5331 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | XO, clock |
| 英文描述： | HM6P5331 - 2.0GHz/500MHz Dual Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2000 MHz, PBGA24 |
| 封裝： | PLASTIC, LGA-24 |
| 文件頁數： | 2/10頁 |
| 文件大小： | 195K |
| 代理商： | HM6P5331 |
PRELIMINARY
Pin Assignment
Pin Description
Leadless Grid Array Package Thin Shrink Small Outline Package
Pin No.
HM6C5332
24-pin LGA
Package
Pin No.
HM6C5332
20-pin TSSOP
Package
PIN
NAME
I/O
Description
24
1
VDDRF
-
Power supply voltage input for RF analog and RF digital circuits. Input may
range from 2.7V to 3.6V. VDDRF must equal VDDIF. Bypass capacitors
should be placed as close as possible to this pin and be connected directly
to the ground plane.
Power Supply for RF charge pump. Must be
≥
VDDRF.
Internal RF charge pump output. For connection to a loop filter for driving
the input of an external VCO.
Ground for RF digital circuitry.
RF prescaler input. Small signal input from the VCO.
This pin is to provide a bypass capacitor to the internal voltage supply and
bypass capacitor must be placed between this pin and RF analog GND(Pin
7). With a slight performance degradation, this pin may be NC.
Ground for RF analog circuitry.
Oscillator input. The input has a VDDRF/2 input threshold and can be
driven from an external CMOS or TTL logic gate.
Ground for data interface, FoLD, and oscillator circuits.
Multiplexed output of the RF/IF programmable or reference dividers, and
RF/IF lock detect signals. CMOS output(
See Programmable Modes
)
High impedance CMOS Clock input. Data for the various counters is
clocked in on the rising edge, into the 22-bit shift register.
Binary serial data input. Data entered MSB first. The last two bits are the
control bits. High impedance CMOS input.
Load enable high impedance CMOS input. When LE goes HIGH, data
stored in the shift register is loaded into one of the 4 appropriate
latches(control bit dependent).
2
2
VPPRF
-
3
3
DoRF
O
4
5
4
5
VSRFD
finRF
-
I
6
6
VIRF
-
7
7
VSRFA
-
8
8
OSCin
I
10
9
VSS
-
11
10
FoLD
O
12
11
Clock
I
14
12
Data
I
15
13
LE
I
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