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參數資料
| 型號： | HT48RB8 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit USB Type OTP MCU |
| 中文描述： | 8位微控制器的USB型檢察官辦公室 |
| 文件頁數： | 22/45頁 |
| 文件大小： | 281K |
| 代理商： | HT48RB8 |
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HT48RB8
Rev. 1.30
22
February 10, 2003
The definitions of the USB status and control register (USC; 1AH) are as shown.
USC
Bits
R/W
Function
SUSP
0
R
Read only, USB suspend indication. When this bit is set to 1 (set by SIE), it indi-
cates the USB bus enters suspend mode. The USB interrupt is also triggered on any
changing of this bit.
RMWK
1
W
USB remote wake up command. It is set by MCU to force the USB host leaving the
suspend mode. When this bit is set to 1 , 2 s delay for clearing this bit to 0 is
needed to insure the RMWK command is accepted by SIE.
URST
2
R/W
USB reset indication. This bit is set/cleared by USB SIE. When the URST is set to
1 ,thisindicatesanUSBresetisoccurredandanUSBinterruptwillbeinitialized.
RESUME
3
R
USB resume indication. When the USB leaves suspend mode, this bit is set to 1
(set by SIE). This bit will appear 20ms waiting for MCU to detect. When the RE-
SUME is set by SIE, an interrupt will be generated to wake-up the MCU. In order to
detecting the suspend state, MCU should set USBCKEN and SUSP2 (in SCC regis-
ter) to enable the SIE detecting function. The RESUME will be cleared while the
SUSP is going 0 . When MCU is detecting the SUSP, the RESUME (causes MCU
to wake-up) should be remembered and token into consideration.
4
R
Undefined bit
5
R
Undefined bit
6
W
This bit should be set as 1
7
W
Data for driving USBD+/CLK pin when work under 3D PS2 mouse function.
(Default= 1 ) This bit should be set as 1
The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed and to select
A/D converter operation modes. The endpoint request flags (EP0IF, EP1IF, EP2IF and EP3IF) are used to indicate
which endpoints are accessed. If an endpoint is accessed, the related endpoint request flag will be set to 1 and the
USB interrupt will occur (if USB interrupt is enabled and the stack is not full). When the active endpoint request flag is
served, the endpoint request flag has to be cleared to 0 .
USR
Bits
R/W
Function
EP0IF
0
R/W
When this bit is set to 1 (set by SIE), it indicates the endpoint 0 is accessed and an
USB interrupt will occur. When the interrupt has been served, this bit should be
cleared by firmware.
EP1IF
1
R/W
When this bit is set to 1 (set by SIE), it indicates the endpoint 1 is accessed and an
USB interrupt will occur. When the interrupt has been served, this bit should be
cleared by firmware.
EP2IF
2
R/W
When this bit is set to 1 (set by SIE), it indicates the endpoint 2 is accessed and an
USB interrupt will occur. When the interrupt has been served, this bit should be
cleared by firmware.
EP3IF
3
R/W
When this bit is set to 1 (set by SIE), it indicates the endpoint 3 is accessed and an
USB interrupt will occur. When the interrupt has been served, this bit should be
cleared by firmware.
4
R/W This bit should be forced to 0 .
5
R/W This bit should be set as 1 .
ADREF
6
R/W
The reference voltage of A/D converter is coming from the VDD and VSS of MCU
when this bit is set 1 . Otherwise, the reference voltage of A/D converter comes
from external PB6/VRL and PB7/VRH pins. (Default= 1 )
FIFO-cntl
7
W
For ICE only, 0 for FIFO read (Default= 0 ); 1 for FIFO write
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