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參數資料
| 型號： | HT48RB8 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit USB Type OTP MCU |
| 中文描述： | 8位微控制器的USB型檢察官辦公室 |
| 文件頁數： | 9/45頁 |
| 文件大小： | 281K |
| 代理商： | HT48RB8 |
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HT48RB8
Rev. 1.30
9
February 10, 2003
Data Memory
RAM for Bank 1
The special function registers used in USB interface are
located in RAM bank 1. In order to access Bank1 regis-
ter, only the Indirect addressing pointer MP1 can be
usedandtheBankregisterBPshouldsetto1.Themap-
ping of RAM bank 1 is as shown.
Indirect Addressing Register
Location 00H and 02H are indirect addressing registers
that are not physically implemented. Any read/write op-
eration of [00H] ([02H]) will access data memory pointed
to by MP0 (MP1). Reading location 00H (02H) itself indi-
rectly will return the result 00H. Writing indirectly results
in no operation.
The indirect addressing pointer (MP0) always point to
Bank0 RAM addresses no matter the value of Bank
Register (BP).
The indirect addressing pointer (MP1) can access
Bank0 or Bank1 RAM data according the value of BP is
set to 0 or 1 respectively.
The memory pointer registers (MP0 and MP1) are 8-bit
registers.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can carry out immediate data operations. The data
movement between two data memory locations must
pass through the accumulator.
Arithmetic and Logic Unit
ALU
This circuit performs 8-bit arithmetic and logic opera-
tions. The ALU provides the following functions:
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data operation
but also changes the status register.
Status Register
STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry
flag (C), auxiliary carry flag (AC), overflow flag (OV),
power down flag (PD), and watchdog time-out flag (TO).
It also records the status information and controls the
operation sequence.
With the exception of the TO and PD flags, bits in the
status register can be altered by instructions like
most other registers. Any data written into the status
register will not change the TO or PD flag. In addition
operations related to the status register may give dif-
ferent results from those intended.
Labels
Bits
Function
C
0
C is set if the operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
AC
1
AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z
2
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV
3
OV is set if the operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PD
4
PD is cleared by system power-up or executing the CLR WDT instruction. PD is set by exe-
cuting the HALT instruction.
TO
5
TO is cleared by system power-up or executing the CLR WDT or HALT instruction. TO is
set by a WDT time-out.
6
Unused bit, read as 0
7
Unused bit, read as 0
Status register
"
%
" D (
!
3
"
%
( %
( =
!
+
# #
: :
: :
: :
: :
7
*
2
*
2
*
2
* 7 2
* * 2
* 0 2
* 1 2
* . 2
* 8 2
* 9 2
*
2
* / 2
*
2
: : 2
RAM bank 1
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