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參數資料
型號: HY27SS561M
廠商: Hynix Semiconductor Inc.
英文描述: 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
中文描述: 片256Mbit(32Mx8bit / 16Mx16bit)NAND閃存
文件頁數: 21/44頁
文件大小: 733K
代理商: HY27SS561M
Rev 0.7 / Oct. 2004
21
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Table 6: Status Register Bit
Read Electronic Signature
The device contains a Manufacturer Code and Device Code. To read these codes two steps are required:
1. first use one Bus Write cycle to issue the Read Electronic Signature command (90h)
2. then subsequent Bus Read operations will read the Manufacturer Code and the Device Code until another command
is issued.
Refer to Table, Read Electronic Signature for information on the addresses.
Automatic Page 0 Read at Power-Up
Automatic Page 0 Read at Power-Up is an option available on all devices belonging to the NAND Flash 528 Byte/264
Word Page family. It allows the microcontroller to directly download boot code from page 0, without requiring any
command or address input sequence. The Automatic Page 0 Read option is particularly suited for applications that
boot from the NAND.
Devices delivered with Automatic Page 0 Read at Power-Up can have the Sequential Row Read option either enabled
or disabled.
Bit
NAME
Logic Level
Definition
SR7
Write Protection
'1'
Not Protected
'0'
Protected
SR6
Program/Erase/Read
Controller
'1'
P/E/R C Inactive, device ready
'0'
P/E/R C active, device busy
SR5
Program/ Erase/ Read
Controller
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
SR4, SR3, SR2
Reserved
Don
'
t Care
SR0
Generic Error
'1'
Error - Operation failed
'0'
No Error - Operation successful
Part Number
Manufacture Code
Device Code
Bus Width
HY27US08561M
ADh
75h
x8
HY27SS08561M
ADh
35h
x8
HY27US16561M
00ADh
0055h
x16
HY27SS16561M
00ADh
0045h
x16
相關PDF資料
PDF描述
HY27US16561M 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
HY27US561M 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
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HY27US08561M 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
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