
ISD-300A1
37
October 19, 2001
The USB Resume bit denotes that the USB bus is no longer in suspend.
The Cartridge Insert bit is set when the device media is inserted.
The Cartridge Release bit is set when the device media is ejected.
The Eject Button Press bit is set when the eject button on the device is pressed.
The Eject Button Release bit is set when the eject button on the device is released.
Sector Count –
The USB Full Speed bit indicates the USB bus is now operating in full speed mode (12 Mbit).
The USB High Speed bit indicates the USB bus is now operating in high speed mode (480 Mbit).
Cylinder Low – STATE0
STATE0 is written with the value of NSTATE0 obtained from the previously completed event
notification command. Assertion of NRESET resets STATE0 to 0x00.
Cylinder High – STATE1
STATE1 is written with the value of NSTATE1 obtained from the previously completed event
notification command. Assertion of NRESET resets STATE1 to 0x00.
Notification Register Reads
Register
7
6
Error
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Status
BSY
N/A
5
4
3
2
1
0
N/A
N/A
N/A
NSTATE0
NSTATE1
N/A
N/A
N/A
DRQ
N/A
N/A
N/A
Table 20 - Event Notify Drive Status
Cylinder Low – NSTATE0
NSTATE0 is read from the device and stored for use as STATE0 during the next execution of the
event notification command. NSTATE0 provides temporary non-volatile storage for devices
whose power is controlled by NPWR500 (typically VBUS powered systems). This allows the
device to store information prior to entering a USB suspend state for retrieval after resuming from
the USB low power state.
Cylinder High – NSTATE1
NSTATE1 is read from the device and stored for use as STATE0 during the next execution of the
event notification command. NSTATE0 provides temporary non-volatile storage for devices
whose power is controlled by NPWR500 (typically VBUS powered systems). This allows the
device to store information prior to entering a USB suspend state for retrieval after resuming from
the USB low power state.
Note that a USB reset from the host may interrupt the collection of data. The device must accommodate
the potential for this occurrence.
Status register –
BSY shall be cleared to zero upon command completion.
DRQ shall be cleared to zero.