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參數資料
| 型號： | ISD-300A1 |
| 英文描述： | Universal Serial Bus |
| 中文描述： | 通用串行總線 |
| 文件頁數： | 49/67頁 |
| 文件大小： | 580K |
| 代理商： | ISD-300A1 |
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ISD-300A1
44
October 19, 2001
Limbo Mode
This mode of operation is provided to aid debug in manufacturing environments. The ISD-300A1 3-states
(high Z) all output pins during Limbo mode operation with the exception of the XO pin. The XO pin
output cell does not have 3-state control (always enabled), and thus must be disabled / disconnected by
other means.
Input NandTree Mode
This mode tests the connectivity of all inputs and outputs. While in the Input NandTree Mode of operation,
all bi-directional pins are wired as chain outputs. The results of the connectivity procedure will be seen on
all bi-directional pins. The list below shows the connectivity order of the Input NandTree chain (beginning
to end).
Chain inputs:
BUS_PWR_VALID,
VBUS_POWERED,
DRV_PWR_VALID,
DISK_READY,
SYS_IRQ,
DMARQ,
IORDY,
NCART_DET,
NEJECT,
NRESET,
I_MODE,
ATA_EN
Chain outputs:
GPIO{9:0], DD[15:0], SDA
Bi-di NandTree Mode
This mode test the connectivity of all bi-directional inputs. While in the Bi-di NandTree Mode of
operation, all bi-directional pins are wired as inputs and become part of the NandTree chain. The results of
the connectivity procedure will be seen on all output only pins. The list below shows the connectivity order
of the Bi-di NandTree chain (beginning to end).
Chain inputs:
GPIO[0:9],
Note: GPIO[0] first, GPIO[9] last
DD[15], DD[0], DD[14], DD[1], DD[13], DD[2], DD[12], DD[3], DD[11], DD[4], DD[10], DD[5], DD[9], DD[6], DD[8], DD[7],
Chain outputs:
NLED[1:0], NPWR500, NATA_RESET, NDIOW, NDIOR, NDMACK, ATA_PU_EN, ATA_PD_EN, NCS[1:0], DA[2:0],
NLOWPWR, SCL
Pin connectivity in both NandTree modes can be tested with the following procedure:
1.
Set all inputs on the chain to ‘1’. Outputs will be ‘1’.
2.
Set first input to ‘0’. Outputs will toggle
3.
Set first input back to ‘1’. Outputs will toggle.
4.
Set '0' on the NandTree chain inputs from second input to the end of the chain (in order). The outputs will toggle with each input
toggle, testing pad / IO cell connectivity.
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