欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: ISP1161
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: 全速通用串行總線的單芯片主機和設備控制器
文件頁數: 51/127頁
文件大小: 2762K
代理商: ISP1161
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
51 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
In DACK-only mode the ISP1161 DC uses the DACK2 signal as a data strobe. Input
signals RD and WR are ignored. This mode is used in CPU systems that have a
single address space for memory and I/O access. Such systems have no separate
MEMW and MEMR signals: the RD and WR signals are also used as memory data
strobes.
12.4 End-Of-Transfer conditions
12.4.1
Bulk endpoints
A DMA transfer to/from a bulk endpoint can be terminated by any of the following
conditions (bit names refer to the DMA Configuration Register, see
Table 85
):
An external End-Of-Transfer signal occurs on input EOT
The internal DMA Counter Register reaches zero (CNTREN = 1)
A short/empty packet is received on an enabled OUT endpoint (SHORTP = 1)
DMA operation is disabled by clearing bit DMAEN.
External EOT:
When reading from an OUT endpoint, an external EOT will stop the
DMA operation and
clear any remaining data
in the current FIFO. For a double-
buffered endpoint the other (inactive) buffer is not affected.
When writing to an IN endpoint, an EOT will stop the DMA operation and the data
packet in the FIFO (even if it is smaller than the maximum packet size) will be sent to
the USB host at the next IN token.
DMA Counter Register zero:
An EOT from the DMA Counter Register is enabled by
setting bit CNTREN in the DMA Configuration Register. The ISP1161 has a 16-bit
DMA Counter Register, which specifies the number of bytes to be transferred. When
EOT
RD
WR
End-Of-Transfer
read strobe
write strobe
I
I
I
DMA controller terminates the transfer
not used
not used
Fig 39. ISP1161’s device controller in DACK-only DMA mode.
Table 12: DACK-only mode: pin functions
…continued
Symbol
Description
I/O
Function
RAM
ISP1161
DEVICE
CONTROLLER
DMA
CONTROLLER
CPU
DREQ2
DACK2
HRQ
HLDA
HRQ
HLDA
DREQ
DACK
RD
WR
004aaa010
D0 to D15
相關PDF資料
PDF描述
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
ISP1161BM Full-speed Universal Serial Bus single-chip host and device controller
相關代理商/技術參數
參數描述
ISP1161A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
主站蜘蛛池模板: 巧家县| 普定县| 社旗县| 仁化县| 玛纳斯县| 弥渡县| 通城县| 白城市| 吴忠市| 呼图壁县| 灵武市| 明光市| 尼木县| 齐齐哈尔市| 东至县| 乐山市| 玉屏| 慈溪市| 北海市| 米易县| 金平| 莫力| 交口县| 冀州市| 磴口县| 来凤县| 诏安县| 铁力市| 抚远县| 合作市| 江孜县| 惠安县| 固安县| 县级市| 左贡县| 尤溪县| 乳源| 平远县| 永清县| 肥东县| 呼图壁县|