
Bits 10–0
This is an 11-bit wide register that records the lowest measured value of the vertical back porch in terms of horizontal
line periods during video detect. When no video is detected, the sum of this register and the vertical flyback or sync
should be within 1 line of the total number of lines per field. Once measurement is completed and the auto size enable
bit has cleared itself back to 0, the measured data is ready to be read by the microcontroller. Reading this register before
that may give erroneous results. This register resets to default values, ready to record new measured values when the
auto size enable bit is set again.
Previous Field Vertical Front Porch Duration:
PREV_V_BP1 (0x858C)
PREV_V_BP0 (0x858B)
Reserved
Previous Vertical Front Porch Duration
RSV
VFP PREV[10:0]
Bits 10–0
This is an 11-bit wide register that retains the previous lowest measured value of the vertical front porch during video
detect in horizontal line periods from the previous field. It is used when interlace mode is present, in order to accurately
determine the correct parameter value for the frame. When no video is detected, this register should return a value of
zero. Reading this register within less than one complete field period after the Video Detect Reset may give erroneous
results. This register resets to zero after the Video Detect Reset has been written.
Previous Field Vertical Sync Duration:
V_SYN_PREV (0x858D)
Previous Vertical Sync Duration
VSYNC PREV[7:0]
Bits 7–0
This is an 8-bit wide register that records the previous measured value of the vertical sync during video detect in
horizontal line periods from the previous field. It is used when interlace mode is present, in order to accurately determine
the correct parameter value for the frame. Reading this register within less than one complete field period after the Video
Detect Reset may give erroneous results. This register resets to zero after the Video Detect Reset has been written.
Previous Vertical Back Porch Duration:
PREV_V_BP1 (0x858F)
PREV_V_BP0 (0x858E)
Reserved
Previous Vertical Back Porch Duration
RSV
VBP PREV[10:0]
Bits 10–0
This is an 11-bit wide register that records the previous lowest measured value of the vertical back porch during video
detect in horizontal line periods from the previous field. It is used when interlace mode is present, in order to accurately
determine the correct parameter value for the frame. When no video is detected, this sum of this register and the VSYNC
should be with 1 line of the total number of lines per field. Reading this register within less than one complete field period
after the Video Detect Reset may give erroneous results. This register resets to zero after the Video Detect Reset has
been written.
HiBrite Control Register:
HB CONTROL (0x8590)
INTR_EN
LIMIT
WHDIS
FSHEN
RSV
Bits 3–0
Reserved and should be set to zero.
Bit 4
This bit must be low for the device to display HiBrite Software driven windows. This bit must be set high for Full Screen
HiBrite by the MCU. Bits 4 and 5 must be both high for Full Screen HiBrite.
Bit 5
This bit when set high will enable the Full Screen Hi-Brite feature. This bit can be used by the MCU to highlight the entire
screen without the use of the HiBrite software.
Bit 6
This bit must be set to 1 at all times for proper color bar communication.
Bits 7
Interrupt Enable. This bit must be set to 1 to activate the use of the interrupt bit in 0x8591
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200969 Version 2 Revision 4
Print Date/Time: 2011/07/11 11:20:12
LM1276