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參數資料
| 型號： | LMX9820A |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Bluetooth Serial Port Module |
| 中文描述： | 藍牙串行端口模塊 |
| 文件頁數： | 9/44頁 |
| 文件大小： | 579K |
| 代理商： | LMX9820A |
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Revision 1.0
9
www.national.com
L
6.0 Electrical Specifications
(Continued)
Note:
The voltage regulators are optimized for the internal
operation of the LMX9820A. Because any noise coupled
into these supplies can have influence on the radio perfor-
mance, it is highly recommended to have no additional
load on their outputs.
6.2 DC CHARACTERISTICS
Table 12. Power Supply Requirements
1
Symbol
Parameter
Min
Typ
2
Max
Unit
I
CC-TX
Power supply current for continuous transmit
68
mA
I
CC-RX
Power supply current for continuous receive
62
mA
I
CC-Inq
Inquiry
31
mA
I
RXSL
Receive Data in SPP Link, slave
3
,
4
23
mA
I
RXM
Receive Data in SPP Link, master
3,4
18
mA
I
HV3
Active HV3 SCO Audio Link
22
mA
I
SnM
Sniff Mode, sniff interval 1 second
3
8
mA
I
SC-TLDIS
Scanning, no active link, TL disabled
3,5
2.5
mA
I
Idle
Idle, scanning disabled, TL disabled
3,5
0.15
mA
1.
2.
3.
4.
5.
Power supply requirements based on Class II output power.
VCC = 3.3V, IOVCC = 3.3V, Ambient Temperature = +25°C.
Average values.
Based on UART Baudrate 115.2kbit/s.
TL: Transport Layer
Table 13. Digital DC Characteristics
Symbol
Parameter
Condition
Min
Max
Units
VCC
1
Core Logic Supply Voltage
2.85
3.6
V
IOVCC
2
IO Supply Voltage
2.85
3.6
V
V
IH
Logical 1 Input Voltage
0.7 x
VDD_ANA
VDD_ANA +
0.5
V
V
IL
Logical 0 Input Voltage
-0.5
0.2 x
VDD_ANA
V
V
HYS
Hysteresis Loop Width
3
0.1 x
VDD_ANA
V
I
OH
Logical 1 Output Current
VDD_ANA = 2.8V
-1.6
mA
I
OL
Logical 0 Output Current
VDD_ANA = 2.8V
1.6
mA
I
OHW
Weak Pull-up Current
VDD_ANA = 2.8V
-10
μA
I
IH
High-level Input Current
V
IH
= VDD_ANA = 2.8V
- 10
10
μA
I
IL
Low-level Input Current
V
IL
= 0
- 10
10
μA
I
L
High Impedance Input Leakage
Current
0V
≤
V
IN
≤
VDD_ANA
-2.0
2.0
μA
I
O(Off)
Output Leakage Current (I/O pins in
input mode)
0V
≤
V
OUT
≤
VDD_DIG
-2.0
2.0
μA
1.
2.
3.
VCC internally regulated to VDD_ANA (see Table 11)
IOVCC internally regulated to VDD_DIG (see Table 11)
Guaranteed by design.
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