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參數資料
| 型號： | MC68HC05BD3 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 45/112頁 |
| 文件大小： | 676K |
| 代理商： | MC68HC05BD3 |
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MC68HC05BD3
MOTOROLA
6-1
PULSE WIDTH MODULATION
6
6
PULSE WIDTH MODULATION
The MC68HC05BD3 has 16 PWM channels. Channel 0 to 7 are dedicated PWM channels.
Channel 8 to 15 are shared with port C I/O pins, and are selected by the respective bits in
Configuration register 1. PWM channels 0 to 13 are +10V open-drain type; therefore a pull-up
resistor is required at each of the pins.
6.1
PWM Registers
Each PWM channel has an 8-bit register which contains a 5-bit PWM in the MSB portion and a
3-bit binary rate multiplier (BRM) in the LSB portion. The PWM channel data registers are located
from $20 to $2F.
6.2
General Operation
The value programmed in the 5-bit PWM portion will determine the pulse length of the output. The
clock to the 5-bit PWM portion is the E clock and the repetition rate of the output is hence 62.5KHz
at 2MHz E clock.
The 3-bit BRM will generate a number of narrow pulses which are equally distributed among an
8-PWM-cycle. The number of pulses generated is equal to the number programmed in the 3-bit
BRM portion. Example of the waveforms are shown in Figure 6-1.
Combining the 5-bit PWM together with the 3-bit BRM, the average duty cycle at the output will be
(M+N/8)/32, where M is the content of the 5-bit PWM portion, and N is the content of the 3-bit BRM
portion. Using this mechanism, a true 8-bit resolution PWM is achieved.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
0PWM
$0020
0PWM4
0PWM3
0PWM2
0PWM1
0PWM0
0BRM2
0BRM1
0BRM0
0000 0000
:
:
15PWM
$002F
15PWM4 15PWM3 15PWM2 15PWM1 15PWM0 15BRM2 15BRM1 15BRM0
0000 0000
TPG
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