欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: MC68HC05BD5
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁數: 35/112頁
文件大?。?/td> 676K
代理商: MC68HC05BD5
MC68HC05BD3
MOTOROLA
4-3
RESETS AND INTERRUPTS
4
Note:
COP time-out is prevented by periodically writing a “0” to bit 0 of address $3FF0.
If the watchdog timer is allowed to time-out, an internal reset is generated to reset the MCU.
Because the internal reset signal is used, the MCU comes out of a COP reset in the same
operating mode it was in when the COP time-out was generated.
The COP reset function is always enabled.
See Section 5.3 for more information on the COP watchdog timer.
4.2
INTERRUPTS
The MCU can be interrupted by different sources – four maskable hardware interrupt and one
non-maskable software interrupt:
External signal on the IRQ pin
Multi-Function Timer (MFT)
M-Bus Interface (MBUS)
Sync Signal Processor (SSP)
Software Interrupt Instruction (SWI)
If the interrupt mask bit (I-bit) of the CCR is set, all maskable interrupts (internal and external) are
disabled. Clearing the I-bit enables interrupts.
Interrupts cause the processor to save the register contents on the stack and to set the interrupt
mask (I-bit) to prevent additional interrupts. The RTI instruction causes the register contents to be
recovered from the stack and normal processing to resume.
Unlike reset, hardware interrupts do not cause the current instruction execution to be halted, but
are considered pending until the current instruction is complete. The current instruction is the one
already fetched and being operated on. When the current instruction is complete, the processor
checks all pending hardware interrupts. If interrupts are not masked (CCR I-bit clear) the
processor proceeds with interrupt processing; otherwise, the next instruction is fetched and
executed.
Table 4-1 shows the relative priority of all the possible interrupt sources.
4.2.1
Non-maskable Software Interrupt (SWI)
The software interrupt (SWI) is an executable instruction and a non-maskable interrupt: it is
execute regardless of the state of the I-bit in the CCR. If the I-bit is zero (interrupt enabled), SWI
is executed after interrupts that were pending when the SWI was fetched, but before interrupts
generated after the SWI was fetched. The SWI interrupt service routine address is specified by
the contents of memory locations $3FFC and $3FFD.
TPG
相關PDF資料
PDF描述
MC68HC705BD3 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C4 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C5 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C8A Microcontrollers
MC68HC05C9A 8-Bit Microcontroller(8位微控制器)
相關代理商/技術參數
參數描述
MC68HC05C0CP 制造商:Motorola Inc 功能描述:
MC68HC05C12 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNITS
MC68HC05C12B 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNITS
MC68HC05C12CP 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNITS
MC68HC05C12P 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNITS
主站蜘蛛池模板: 太仓市| 卢氏县| 宜章县| 伊通| 马关县| 高要市| 类乌齐县| 长沙县| 雅安市| 玛纳斯县| 阿尔山市| 乐清市| 聊城市| 宣威市| 正镶白旗| 乐陵市| 云南省| 太和县| 通山县| 花莲市| 察哈| 宝应县| 梧州市| 定远县| 昌平区| 正镶白旗| 乡城县| 天台县| 西吉县| 济宁市| 贺兰县| 道孚县| 噶尔县| 虎林市| 昆明市| 临澧县| 泸州市| 焦作市| 象山县| 区。| 克什克腾旗|