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參數資料
型號: MC68HC05BD5
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁數: 51/112頁
文件大小: 676K
代理商: MC68HC05BD5
MC68HC05BD3
MOTOROLA
7-5
M-BUS SERIAL INTERFACE
7
7.2.7
Clock Synchronization
Since wire-AND logic is performed on the SCL line, a high to low transition on SCL line will affect
the devices connected to the bus. The devices start counting their low period and once a device's
clock has gone low, it will hold the SCL line low until the clock high state is reached. However, the
change of low to high in this device clock may not change the state of the SCL line, if another
device clock is still in its low period. Therefore synchronized clock SCL will be held low by the
device which releases SCL to a logic high in the last place. Devices with shorter low periods enter
a high wait state during this time (see Figure 7-3). When all devices concerned have counted off
their low period, the synchronized clock SCL line will be released and go high. All of them will start
counting their high periods. The first device to complete its high period will again pull the SCL line
low.
7.2.8
Handshaking
The clock synchronization mechanism can be used as a handshake in data transfer. Slave device
may hold the SCL low after completion of one byte transfer (9 bits). In such case, it will halt the
bus clock and force the master clock in a wait state until the slave releases the SCL line.
7.3
M-Bus Registers
There are five registers used in the M-Bus interface, these are discussed in the following
paragraphs.
Figure 7-3
Clock Synchronization
SCL1
SCL2
SCL
Internal counter reset
WAIT
Start counting high period
TPG
相關PDF資料
PDF描述
MC68HC705BD3 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C4 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C5 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HC05C8A Microcontrollers
MC68HC05C9A 8-Bit Microcontroller(8位微控制器)
相關代理商/技術參數
參數描述
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