
Clock Generator Module (CGM)
Technical Data
MC68HC08AB16A
—
Rev. 2.0
124
Clock Generator Module (CGM)
MOTOROLA
9.8.1
9.8.2
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .142
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143
9.9
CGM During Break Interrupts. . . . . . . . . . . . . . . . . . . . . . . . .143
9.10
9.10.1
9.10.2
9.10.3
9.10.4
Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . .143
Acquisition/Lock Time Definitions. . . . . . . . . . . . . . . . . . . .144
Parametric Influences On Reaction Time. . . . . . . . . . . . . .145
Choosing a Filter Capacitor . . . . . . . . . . . . . . . . . . . . . . . .146
Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . . .147
9.2 Introduction
This section describes the clock generator module (CGM). The CGM
generates the crystal clock signal, CGMXCLK, which operates at the
frequency of the crystal. The CGM also generates the base clock signal,
CGMOUT, from which the system integration module (SIM) derives the
system clocks. CGMOUT is based on either the crystal clock divided by
two or the phase-locked loop (PLL) clock, CGMVCLK, divided by two.
The PLL is a frequency generator designed for use with 1MHz to 8MHz
crystals or ceramic resonators. The PLL can generate an 8MHz bus
frequency without using a higher frequency crystal.
9.3 Features
Features of the CGM include the following:
Phase-locked loop with output frequency in integer multiples of the
crystal reference
Programmable hardware voltage-controlled oscillator (VCO) for
low-jitter operation
Automatic bandwidth control mode for low-jitter operation
Automatic frequency lock detector
CPU interrupt on entry or exit from locked condition