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參數資料
型號： MC68HC11A1CFN2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, 2 MHz, MICROCONTROLLER, PQCC52
封裝： PLASTIC, LCC-52
文件頁數： 61/158頁
文件大小： 776K
代理商： MC68HC11A1CFN2
MC68HC11A8
TECHNICAL DATA
SERIAL PERIPHERAL INTERFACE
MOTOROLA
6-3
6
6.3 Functional Description
Figure 6-2
shows a block diagram of the serial peripheral interface circuitry. When a
master device transmits data to a slave device via the MOSI line, the slave device re-
sponds by sending data to the master device via the master’s MISO line. This implies
full duplex transmission with both data out and data in synchronized with the same
clock signal. Thus, the byte transmitted is replaced by the byte received and eliminates
the need for separate transmit-empty and receiver-full status bits. A single status bit
(SPIF) is used to signify that the l/O operation has been completed.
The SPI is double buffered on read, but not on write. If a write is performed during data
transfer, the transfer occurs uninterrupted, and the write will be unsuccessful. This
condition will cause the write collision (WCOL) status bit in the SPSR to be set. After
a data byte is shifted, the SPIF flag of the SPSR is set.
Figure 6-2 Serial Peripheral Interface Block Diagram
In the master mode, the SCK pin is an output. It idles high or low, depending on the
CPOL bit in the SPCR, until data is written to the shift register, at which point eight
clocks are generated to shift the eight bits of data and then SCK goes idle again.
In a slave mode, the slave start logic receives a logic low at the SS pin and a clock
input at the SCK pin. Thus, the slave is synchronized with the master. Data from the
master is received serially at the slave MOSI line and loads the 8-bit shift register. After
the 8-bit shift register is loaded, its data is parallel transferred to the read buffer. During
a write cycle, data is written into the shift register, then the slave waits for a clock train
from the master to shift the data out on the slave’s MISO line.
PIN
CONTROL
LOGIC
MISO
PD2
DIVIDER
CLOCK
LOGIC
SPI STATUS (SPSR)
SPI BLOCK DIAGRAM
S
S
SPI CONTROL (SPCR)
D
M
C
C
S
S
S
W
M
8-BIT SHIFT REGISTER
READ DATA BUFFER
MSB
LSB
CLOCK
M
M
S
S
M
S
SELECT
÷
2
÷
4
÷
16
÷
32
INTERNAL
MCU SYSTEM
CLOCK
SPI CONTROL
S
S
MOSI
PD3
SCK
PD4
SS
PD5
M
S
D
MSTR
SPE
SPIE
SPI CLOCK (MSTR = 1)
8
SPI
INTERRUPT
相關PDF資料
PDF描述
MC68HCP11A1CFN2 HCMOS Single-Chip Microcontroller
MC68HCP11A1CFN3 HCMOS Single-Chip Microcontroller
MC68HCP11A1CP2 HCMOS Single-Chip Microcontroller
MC68HCP11A1CP3 HCMOS Single-Chip Microcontroller
MC68HCP11A1MFN2 HCMOS Single-Chip Microcontroller
相關代理商/技術參數
參數描述
MC68HC11A1CFN3 制造商:Rochester Electronics LLC 功能描述:
MC68HC11A1CFNE3 功能描述:8位微控制器 -MCU 8B MCU 256RAM A/D EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC68HC11A1CFNE3 制造商:Freescale Semiconductor 功能描述:8-BIT MICROCONTROLLER IC
MC68HC11A1CFNE3R 功能描述:8位微控制器 -MCU 8B MCU 256RAM A/D EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC68HC11A1CFU2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Single-Chip Microcontroller
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