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參數(shù)資料
| 型號： | NCN6001DTBEVB |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 31/36頁 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR NCN6001DTB |
| 設(shè)計資源： | NCN6001DTBEVB Gerber Files NCN6001 Demo Brd Schematic NCN6001DBEVB BOM |
| 標準包裝： | 1 |
| 主要目的： | 接口，智能卡 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | NCN6001 |
| 主要屬性： | 與 ISO 7816-3，EMV，GIE-CB 兼容 |
| 次要屬性： | 符合 GSM 規(guī)定 |
| 已供物品： | 板 |
| 其它名稱： | NCN6001DTBEVBOS |
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NCN6001
http://onsemi.com
4
PIN FUNCTIONS AND DESCRIPTION
TSSOP LLGA
Name
Type
Description
1
18
I/O
Input/Output
Pullup
This pin is connected to an external microcontroller interface. A bidirectional level
translator adapts the serial I/O signal between the smart card and the microcontroller.
The level translator is enabled when CS = L, the sub address has been selected and
the system operates in the Asynchronous mode. When a Synchronous card is in use,
this pin is disconnected and the data and the transaction take place with the MISO b3
register.
The internal pullup resistor connected on the mC side is activated and visible by the
selected chip only.
2
19
INT
OUTPUT
Pullup
This pin is activated LOW when a card has been inserted and detected by CRD_DET
pin. Similarly, an interrupt is generated when the CRD_VCC output is overloaded, or
when the card has been extracted whatever be the transaction status (running or
standby).
The INT signal is reset to High according to Table 7 and Figure 11. On the other hand,
the pin is forced to a logic High when the input voltage VCC drops below 2.0 V.
3
20
CLK_IN
CLOCK
INPUT
High
impedance
The builtin Schmitt trigger receiver makes this pin suitable for a large type of clock
signal (Figure 30). This pin can be connected to either the microcontroller master
clock, or to a crystal signal, to drive the external smart cards. The signal is fed to the
internal clock selector circuit and translated to the CRD_CLK pin at either the same
frequency, or divided by 2 or 4, depending upon the programming mode.
Note: The chip guarantees the EMV 50% Duty Cycle when the clock divider ratio is
1/2 or 1/4, even when the CLK_IN signal is out of the 45% to 55% range specified by
ISO and EMV specifications.
Care must be observed, at PCB level, to minimize the pickup noise coming from the
CLK_IN line.
4
1
MOSI
INPUT
Master Out Slave In: SPI Data Input from the external microcontroller. This byte
contents the address of the selected chip among the four possible, together with the
programming code for a given interface.
5
2
CLK_SPI
INPUT
Clock Signal to synchronize the SPI data transfer. The builtin Schmitt trigger receiver
makes this pin compatible with a wide range of input clock signal (Figure 30). This
clock is fully independent from the CLK_IN signal and does not play any role with the
data transaction.
6
3
EN_RPU
INPUT, Logic
This pin is used to activate the I/O internal pullup resistor according to the here below
true table:
EN_RPU = Low I/O Pullup resistor disconnected
EN_RPU = High I/O Pullup resistor connected
When two or more NCN6001 chips shares the same I/O bus, one chip only shall have
the internal pullup resistor enabled to avoid any overload of the I/O line.
Moreover, when Asynchronous and Synchronous cards are handled by the interfaces,
the activated I/O pullup resistor must preferably be the one associated with the
Asynchronous circuit
.
On the other hand, since no internal pullup bias resistor is built in the chip, pin 6 must
be connected to the right voltage level to make sure the logic function is satisfied.
7
4
MISO
OUTPUT
Master In Slave Out: SPI Data Output from the NCN6001. This byte carries the state
of the interface, the serial transfer being achieved according to the programmed mode
(Table 2), using the same CLK_SPI signal and during the same MOSI time frame. The
three high bits [b7:b5] have no meaning and shall be discarded by the microcontroller.
An external 4.7 kW Pull down resistor might be necessary to avoid misunderstanding
of the pin 7 voltage during the High Z state.
8
5
CS
INPUT
This pin synchronizes the SPI communication and provides the chip address and
selected functions.
All the NCN6001 functions, both programming and card transaction, are disabled
when CS = H.
9
6
VCC
POWER
This pin is connected to the NCN6001 supply voltage and must be bypassed to
ground by a 10 mF/6.0 V capacitor.
Since tantalum capacitors have relative high ESR, using low ESR ceramic type
(MURATA X5R, Resr < 100 mW) is highly recommended.
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