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參數資料
| 型號： | NCN6001DTBEVB |
| 廠商： | ON Semiconductor |
| 文件頁數： | 6/36頁 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR NCN6001DTB |
| 設計資源： | NCN6001DTBEVB Gerber Files NCN6001 Demo Brd Schematic NCN6001DBEVB BOM |
| 標準包裝： | 1 |
| 主要目的： | 接口，智能卡 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | NCN6001 |
| 主要屬性： | 與 ISO 7816-3，EMV，GIE-CB 兼容 |
| 次要屬性： | 符合 GSM 規定 |
| 已供物品： | 板 |
| 其它名稱： | NCN6001DTBEVBOS |
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NCN6001
http://onsemi.com
14
STARTUP DEFAULT CONDITIONS
At startup, when the VCC power supply is turned on, the
internal POR circuit sets the chip in the default conditions as
defined in Table 4.
Table 4. STARTUP DEFAULT CONDITIONS
CRD_DET
Normally Open
CRD_VCC
Off
CRD_CLK
tr and tf = SLOW
CRD_CLK
Low
Protocol
Special Mode
CARD DETECTION
The card is detected by the external switch connected pin
18. The internal circuit provides a positive bias of this pin
and the polarity of the insertion/extraction is programmable
by the MOSI protocol as depicted in Table 2.
The bias current is 1.0
mA typical and care must be
observed to avoid leakage to ground from this pin to
maintain the logic function. In particular, using a low
impedance probe (< 1.0 M
W) may lead to uncontrolled
operation during the debug.
Depending upon the programmed condition, the card can
be detected either by a Normally Open (default condition) or
a Normally Close switch (Table 2). On the other hand, the
meaning of the feedback message contained in the MISO
register bit b4, depends upon the SPI mode of operation as
defined here below:
SPI Normal Mode: the MISO bit b4 is High when a card is
inserted, whatever be the polarity of the card detect switch.
SPI Special Mode: the MISO bit b4 copies the logic state of
the Card detect switch as depicted here below, whatever be
the polarity of the switch used to handle the detection:
CRD_DET = Low MISO/b4 = Low
CRD_DET = High MISO/b4 = High
CRD_VCC OPERATION
The builtin DC/DC converter provides the CRD_VCC
voltage and can be programmed to run one of the three
possible values, 1.8 V, 3.0 V or 5.0 V, assuming the input
voltage VCC is within the 2.7 V to 5.5 V range. In any case,
CRD_VCC is voltage regulated, together with a current
overload detection. On the other hand, the power conversion
is automatically switched to handle either a boost or a buck
mode of operation, depending upon the difference between
the input voltage VCC and the output supply CRD_VCC.
The CRD_VCC output current is a function of the VCC
input value as depicted in Table 5.
Table 5. CRD_VCC OUTPUT VOLTAGE RANGE
CRD_VCC
Comments
1.80 V
Maximum Output DC Current = 35 mA
3.0 V
Maximum Output DC Current = 60 mA
5.0 V
Maximum Output DC Current = 65 mA
Whatever the CRD_VCC output voltage may be, a
builtin comparator makes sure the voltage is within the
ISO78163/ EMV specifications. If the voltage is no longer
within the minimum/maximum values, the DC/DC is
switched Off, the Power Down sequence takes place and an
interrupt is presented at the INT pin 2.
POWERUP SEQUENCE
The Powerup Sequence makes sure all the card related
signals are Low during the CRD_VCC positive going slope.
These lines are validated when CRD_VCC is above the
minimum specified voltage (depending upon the
programmed CRD_VCC value).
Figure 4. Typical Startup CRD_VCC Sequence
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