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參數資料
| 型號： | P89LPC920 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM |
| 中文描述： | 8位微控制器兩個小時80C51的核心2鍵盤/ 4 KB的/ 8 KB的3伏的低功耗Flash 256 - RAM的字節數據 |
| 文件頁數： | 18/45頁 |
| 文件大小： | 877K |
| 代理商： | P89LPC920 |
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Philips Semiconductors
P89LPC920/921/922
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 06 — 21 November 2003
18 of 45
9397 750 12285
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.12 I/O ports
The P89LPC920/921/922 has three I/O ports: Port 0, Port 1, and Port 3. Ports 0 and
1 are 8-bit ports, and Port 3 is a 2-bit port. The exact number of I/O pins available
depend upon the clock and reset options chosen, as shown in
Table 6
.
8.12.1
Port configurations
All but three I/O port pins on the P89LPC920/921/922 may be configured by software
to one of four types on a bit-by-bit basis. These are: quasi-bidirectional (standard
80C51 port outputs), push-pull, open drain, and input-only. Two configuration
registers for each port select the output type for each port pin.
P1.5 (RST) can only be an input and cannot be configured.
P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be configured to be either input-only or
open-drain.
Fig 6.
Interrupt sources, interrupt enables, and power-down wake-up sources.
002aaa418
IE0
EX0
IE1
EX1
BOPD
EBO
KBIF
EKBI
INTERRUPT
TO CPU
WAKE-UP
(IF IN POWER-DOWN)
EWDRT
CMF2
CMF1
EC
EA (IE0.7)
TF0
ET0
TF1
ET1
TI & RI/RI
ES/ESR
TI
EST
SI
EI2C
RTCF
ERTC
(RTCCON.1)
WDOVF
Table 6:
Clock source
Number of I/O pins available
Reset option
Number of I/O pins
(20-pin package)
18
17
17
16
16
15
On-chip oscillator or watchdog oscillator
No external reset (except during power-up)
External RST pin supported
No external reset (except during power-up)
External RST pin supported
No external reset (except during power-up)
External RST pin supported
External clock input
Low/medium/high speed oscillator
(external crystal or resonator)
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