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參數資料
型號: P89LPC920
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM
中文描述: 8位微控制器兩個小時80C51的核心2鍵盤/ 4 KB的/ 8 KB的3伏的低功耗Flash 256 - RAM的字節數據
文件頁數: 24/45頁
文件大小: 877K
代理商: P89LPC920
Philips Semiconductors
P89LPC920/921/922
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 06 — 21 November 2003
24 of 45
9397 750 12285
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.18.1
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are
transmitted or received, LSB first. The baud rate is fixed at
1
16
of the CPU clock
frequency.
8.18.2
Mode 1
10 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), and a stop bit (logical ‘1’). When data is received,
the stop bit is stored in RB8 in Special Function Register SCON. The baud rate is
variable and is determined by the Timer 1 overflow rate or the Baud Rate Generator
(described in
Section 8.18.5 “Baud rate generator and selection”
).
8.18.3
Mode 2
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical ‘0’),
8 data bits (LSB first), a programmable 9
th
data bit, and a stop bit (logical ‘1’). When
data is transmitted, the 9
th
data bit (TB8 in SCON) can be assigned the value of ‘0’ or
‘1’. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When
data is received, the 9
th
data bit goes into RB8 in Special Function Register SCON,
while the stop bit is not saved. The baud rate is programmable to either
1
16
or
1
32
of
the CPU clock frequency, as determined by the SMOD1 bit in PCON.
8.18.4
Mode 3
11 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), a programmable 9
th
data bit, and a stop bit
(logical ‘1’). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate.
The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or
the Baud Rate Generator (described in
Section 8.18.5 “Baud rate generator and
selection”
).
8.18.5
Baud rate generator and selection
The P89LPC920/921/922 enhanced UART has an independent Baud Rate
Generator. The baud rate is determined by a baud-rate preprogrammed into the
BRGR1 and BRGR0 SFRs which together form a 16-bit baud rate divisor value that
works in a similar manner as Timer 1 but is much more accurate. If the baud rate
generator is used, Timer 1 can be used for other timing functions.
The UART can use either Timer 1 or the baud rate generator output (see
Figure 7
).
Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is set. The
independent Baud Rate Generator uses OSCCLK.
Fig 7.
Baud rate sources for UART (Modes 1, 3).
Baud Rate Modes 1 and 3
SBRGS = 1
SBRGS = 0
SMOD1 = 0
SMOD1 = 1
2
Timer 1 Overflow
(PCLK-based)
Baud Rate Generator
(CCLK-based)
002aaa419
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