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參數(shù)資料
| 型號： | P89LPC931 |
| 英文描述： | 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM |
| 中文描述： | 8位微控制器兩個小時80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù) |
| 文件頁數(shù)： | 24/54頁 |
| 文件大小： | 1015K |
| 代理商： | P89LPC931 |
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Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 03 — 06 October 2003
24 of 54
9397 750 12122
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Remark:
During a power cycle, V
DD
must fall below V
POR
(see
Table 7 “DC electrical
characteristics” on page 40
) before power is reapplied, in order to ensure a power-on
reset.
Reset can be triggered from the following sources:
External reset pin (during power-up or if user configured via UCFG1)
Power-on detect
Brownout detect
Watchdog Timer
Software reset
UART break character detect reset
For every reset source, there is a flag in the Reset Register, RSTSRC. The user can
read this register to determine the most recent reset source. These flag bits can be
cleared in software by writing a ‘0’ to the corresponding bit. More than one flag bit
may be set:
During a power-on reset, both POF and BOF are set but the other flag bits are
cleared.
For any other reset, previously set flag bits that have not been cleared will remain
set.
8.14.1
Reset vector
Following reset, the P89LPC930/931 will fetch instructions from either address 0000h
or the Boot address. The Boot address is formed by using the Boot Vector as the high
byte of the address and the low byte of the address = 00h.
The Boot address will be used if a UART break reset occurs, or the non-volatile Boot
Status bit (BOOTSTAT.0) = 1, or the device is forced into ISP mode during power-on
(see P89LPC930/931 User’s Manual). Otherwise, instructions will be fetched from
address 0000H.
8.15 Timers/counters 0 and 1
The P89LPC930/931 has two general purpose counter/timers which are upward
compatible with the standard 80C51 Timer 0 and Timer 1. Both can be configured to
operate either as timers or event counter. An option to automatically toggle the T0
and/or T1 pins upon timer overflow has been added.
In the ‘Timer’ function, the register is incremented every machine cycle.
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition
at its corresponding external input pin, T0 or T1. In this function, the external input is
sampled once during every machine cycle.
Timer 0 and Timer 1 have five operating modes (modes 0, 1, 2, 3 and 6). Modes 0, 1,
2 and 6 are the same for both Timers/Counters. Mode 3 is different.
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| P89LPC931A1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash |
| P89LPC931A1FDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash |
| P89LPC931A1FDH,512 | 功能描述:8位微控制器 -MCU IC 80C51 MCU FLASH 8K RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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