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參數(shù)資料
| 型號： | Q67120-C508 |
| 英文描述： | IC-SM-8-BIT CPU 12-MHZ |
| 中文描述： | 集成電路釤8位CPU的12兆赫 |
| 文件頁數(shù)： | 33/121頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | Q67120-C508 |
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System Reset
C501
Semiconductor Group
5-1
5
System Reset
5.1
Hardware Reset
The hardware reset function incorporated in the C501 allows for an easy automatic start-up at a
minimum of additional hardware and forces the controller to a predefined default state. The
hardware reset function can also be used during normal operation in order to restart the device. This
is particularly done when the power-down mode is to be terminated.
The RESET input is an active high input. An internal Schmitt trigger is used at the input for noise
rejection. Since the reset is synchronized internally, the RESET pin must be held high for at least
two machine cycles (24 oscillator periods) while the oscillator is running. With the oscillator running
the internal reset is executed during the second machine cycle and is repeated every cycle until
RESET goes low again.
During reset, pins ALE and PSEN are configured as inputs and should not be stimulated externally.
An external stimulation at these lines during reset activates several test modes which are reserved
for test purposes. This in turn may cause unpredictable output operations at several port pins.
A pullup resistor is internally connected to
V
CC
to allow a power-up reset with an external capacitor
only. An automatic reset can be obtained when
V
CC
is applied by connecting the RESET pin to
V
SS
via a capacitor. After
V
CC
has been turned on, the capacitor must hold the voltage level at the
RESET pin for a specific time to effect a complete reset.
A correct reset leaves the processor in a defined state. The program execution starts at location
0000H. After reset is internally accomplished the port latches of ports 0, 1, 2 and 3 default in FFH.
This leaves port 0 floating, since it is an open drain port when not used as data/address bus. All
other I/O port lines (ports 1, 2 and 3) output at one (1).
The content of the internal RAM of the C501 is not affected by a reset. After power-up the content
is undefined, while it remains unchanged during a reset if the power supply is not turned off.
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