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參數(shù)資料
| 型號(hào)： | Q67120-C508 |
| 英文描述： | IC-SM-8-BIT CPU 12-MHZ |
| 中文描述： | 集成電路釤8位CPU的12兆赫 |
| 文件頁(yè)數(shù)： | 66/121頁(yè) |
| 文件大小： | 1000K |
| 代理商： | Q67120-C508 |
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Semiconductor Group
6-32
On-Chip Peripheral Components
C501
6.3.3 Baud Rates Generation
There are several possibilities to generate the baud rate clock for the serial port depending on the
mode in which it is operating.
For clarification some terms regarding the difference between “baud rate clock” and “baud rate”
should be mentioned. The serial interface requires a clock rate which is 16 times the baud rate for
internal synchronization. Therefore, the baud rate generators have to provide a “baud rate clock” to
the serial interface which - there divided by 16 - results in the actual “baud rate”. However, all
formulas given in the following section already include the factor and calculate the final baud rate.
Further, the abrevation
f
OSC
refers to the external clock frequency (oscillator or external input clock
operation).
The baud rate of the serial port is controlled by bit SMOD which is located in the special function
register PCON as shown below.
Special Function Register PCON (Address 87H)
Reset Value : 0XXX0000B
Mode 0
The baud rate in mode 0 is fixed:
Mode 0 baud rate = oscillator frequency/12 =
f
OSC
/12
Mode 2
The baud rate in mode 2 depends on the value of bit SMOD in special function register PCON. If
SMOD = 0 (which is the value on reset), the baud rate is
f
OSC
/64. If SMOD = 1, the baud rate is
f
OSC
/
32.
Mode 2 baud rate = 2
SMOD
/64
×
(
f
OSC
)
Modes 1 and 3
The baud rates in mode 1 and 3 are determined by the timer overflow rate. These baud rates can
be determined by timer 1 or by timer 2 or by both (one for transmit and the other for receive).
Bit
Function
SMOD
Double baud rate
When set, the baud rate of serial interface in modes 1, 2, 3 is doubled. After reset
this bit is cleared.
SMOD
–
–
–
87H
PCON
Bit No.
MSB
7
LSB
0
GF1
GF0
PDE
IDLE
6
5
4
3
2
1
The shaded bits are not used for controlling the baud rate.
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