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參數資料
型號: S29GL032M10BFIR13
廠商: SPANSION LLC
元件分類: PROM
英文描述: MirrorBit Flash Family
中文描述: 2M X 16 FLASH 3V PROM, 100 ns, PBGA64
封裝: 13 X 11 MM, LEAD FREE, FORTIFIED BGA-64
文件頁數: 19/158頁
文件大小: 4695K
代理商: S29GL032M10BFIR13
August 4, 2004 S29GLxxxM_00_B1_E
S29GLxxxM MirrorBitTM Flash Family
115
Da ta shee t
Write Operation Status
The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6,
and DQ7. Table 19 and the following subsections describe the function of these bits. DQ7 and DQ6 each offer a
method for determining whether a program or erase operation is complete or in progress. The device also pro-
vides a hardware-based output signal, RY/BY#, to determine whether an Embedded Program or Erase operation
is in progress or has been completed.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm is in
progress or completed, or whether the device is in Erase Suspend. Data# Polling is valid after the rising edge of
the final WE# pulse in the command sequence.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum programmed
to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the Embedded Program algo-
rithm is complete, the device outputs the datum programmed to DQ7. The system must provide the program
address to read valid status information on DQ7. If a program address falls within a protected sector, Data# Polling
on DQ7 is active for approximately 1 s, then the device returns to the read mode.
During the Embedded Erase algorithm, Data# Polling produces a “0” on DQ7. When the Embedded Erase algo-
rithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a “1” on DQ7. The
system must provide an address within any of the sectors selected for erasure to read valid status information on
DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected, Data# Polling on
DQ7 is active for approximately 100 s, then the device returns to the read mode. If not all selected sectors are
protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that
are protected. However, if the system reads DQ7 at an address within a protected sector, the status may not be
valid.
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asynchronously with
DQ0–DQ6 while Output Enable (OE#) is asserted low. That is, the device may change from providing status in-
formation to valid data on DQ7. Depending on when the system samples the DQ7 output, it may read the status
or valid data. Even if the device has completed the program or erase operation and DQ7 has valid data, the data
outputs on DQ0–DQ6 may be still invalid. Valid data on DQ0–DQ7 will appear on successive read cycles.
Table 37 shows the outputs for Data# Polling on DQ7. Figure 7 shows the Data# Polling algorithm. Figure 17 in
the AC Characteristics section shows the Data# Polling timing diagram.
相關PDF資料
PDF描述
S29GL032M10BFIR30 T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 12mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination
S29GL032M10FAIR22 MirrorBit Flash Family
S29GL032M10FAIR23 MirrorBit Flash Family
S29GL032M10FAIR30 MirrorBit Flash Family
S29GL032M10FAIR32 Tantalum Capacitor; Capacitance:220uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:10V; Package/Case:7343-31; Terminal Type:PCB SMT; ESR:0.001ohm; Packaging:Cut Tape; Series:T530
相關代理商/技術參數
參數描述
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