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參數資料

August 4, 2004 S29GLxxxM_00_B1_E

S29GLxxxM MirrorBitTM Flash Family

117

Da ta shee t

DQ6: Toggle Bit I

Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or

whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is valid

after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase operation),

and during the sector erase time-out.

During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause DQ6 to

toggle. The system may use either OE# or CE# to control the read cycles. When the operation is complete, DQ6

stops toggling.

After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for

approximately 100 s, then returns to reading array data. If not all selected sectors are protected, the Embedded

Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected.

The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-sus-

pended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6 toggles.

When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must also use DQ2

to determine which sectors are erasing or erase-suspended. Alternatively, the system can use DQ7 (see the sub-

section on DQ7: Data# Polling).

If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after the program com-

mand sequence is written, then returns to reading array data.

DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program al-

gorithm is complete.

Table 37 shows the outputs for Toggle Bit I on DQ6. Figure 8 shows the toggle bit algorithm. 20 in the “AC Char-

acteristics” section shows the toggle bit timing diagrams. 21 shows the differences between DQ2 and DQ6 in

graphical form. See also the subsection on DQ2: Toggle Bit II.

相關PDF資料	PDF描述
S29GL032M10BFIR30	T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 12mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination
S29GL032M10FAIR22	MirrorBit Flash Family
S29GL032M10FAIR23	MirrorBit Flash Family
S29GL032M10FAIR30	MirrorBit Flash Family
S29GL032M10FAIR32	Tantalum Capacitor; Capacitance:220uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:10V; Package/Case:7343-31; Terminal Type:PCB SMT; ESR:0.001ohm; Packaging:Cut Tape; Series:T530

相關代理商/技術參數	參數描述
S29GL032M10BFIR20	制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR22	制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR23	制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR30	制造商:SPANSION 制造商全稱:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL032M10BFIR32	制造商:SPANSION 制造商全稱:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology

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