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參數資料
| 型號： | TLV320AIC22PTR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LQFP-48 |
| 文件頁數： | 17/55頁 |
| 文件大小： | 782K |
| 代理商： | TLV320AIC22PTR |
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TLV320AIC22
DUAL VOIP CODEC
SLAS281B – JULY 2000 – REVISED JUNE 2002
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ADC data word (continued)
Figure 8 describes the ADC data-word format when the data-valid flag is disabled.
When the data-valid flag is disabled, 16 bits of data are presented in the linear mode, with the MSB in bit 15.
When A-law or
-law PCM coding is selected, the 8 bits of the PCM data are located with the MSB in the bit-7
position and the LSB in the bit 0 position. The upper byte of the 16-bit word can be ignored for PCM coding and
will contain zeros.
0
1
87
6
5
4
3
2
10
11
12
13
14
15
9
16-Bit Codec Data (Linear Mode)
MSB
LSB
NOTE: The MSB of the codec data is bit 15 for linear mode and bit 7 for A-law and
-law.
8-Bit Codec Data (A-Law,
-Law PCM Mode)
Figure 8. Bit Assignment and Definition for ADC Data Word When the Data-Valid Flag is Disabled
DAC data word
The DAC data word (input on DIN) can be any of the following:
D 16 bits of linear data
D A-law or -law coded PCM data
The structure of the DAC data word is shown in Figure 9.
0
1
8
7
654
32
10
11
12
13
14
15
9
16-Bit Codec Data (Linear Mode)
MSB
LSB
NOTE: The MSB of the DAC data is bit 15 for linear mode and bit 7 for A-law and
-law.
8-Bit Codec Data (A-Law,
-Law PCM Mode)
All Zero When A-Law or
-Law PCM
Coding Selected
Figure 9. Bit Assignment and Definition for DAC Data Word
address pins description
The AD1 and AD0 pins are used to define the address of the codec in the I2C mode and for the serial interface.
See the register programming using the I2C bus section for a detailed description of the I2C mode. For the serial
interface, the address determines the time slot used by a certain codec. Provisions are made to support up to
four TLV320AIC22s connected to a single DSP. Therefore, eight slots are used for data.
Table 4 shows how the time slots used are related to the AD1 and AD0 address lines. Codec 1 in a TLV320AIC22
communicates during the first assigned time slot, based on the AD0 and AD1 configuration, while codec 2 in
the same TLV320AIC22 communicates during the second assigned time slot, based on that same AD0/AD1
configuration.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV320AIC23 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:STereo Audio CODEC, 8- to 96kHz, With Integrated Headphone Amplifier |
| TLV320AIC23_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio CODEC, 8-to 96-kHz, With Integrated Headphone Amplifier |
| TLV320AIC23B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio CODEC, 8-to 96-kHz, With Integrated Headphone Amplifier |
| TLV320AIC23B_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Stereo Audio CODEC, 8-to 96-kHz, With Integrated Headphone Amplifier |
| TLV320AIC23BGQE | 功能描述:接口—CODEC Lo-Pwr Highly Integrated Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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