- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98254 > TLV320AIC32IRHB (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQCC32 PDF資料下載
參數(shù)資料
| 型號： | TLV320AIC32IRHB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 14/76頁 |
| 文件大小： | 1124K |
| 代理商： | TLV320AIC32IRHB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
www.ti.com
BCLK
WCLK
SDIN/
SDOUT
n2 n3
1
0
n1 n2
1
0
1/fs
LSB
MSB
Left Channel
Right Channel
n1
MSB
LSB
n4
2
n3
2
MSB
LSB
TDM DATA TRANSFER
N-1
N-2
1
0
N-1
N-2
1
0
word
clock
bit clock
data
in/out
RightChannelData
LeftChannelData
N-1
N-2
1
0
N-1
N-2
1
0
word
clock
bit clock
data
in/out
DSP Mode
LeftJustifiedMode
offset
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
OVERVIEW (continued)
Figure 22. DSP Serial Bus Mode Operation
Time-division multiplexed data transfer can be realized in any of the above transfer modes if the 256-clock bit
clock mode is selected, although it is recommended to be used in either left-justified mode or DSP mode. By
changing the programmable offset, the bit clock in each frame where the data begins can be changed, and the
serial data output driver (DOUT) can also be programmed to tri-state during all bit clocks except when valid data
is being put onto the bus. This allows other codecs to be programmed with different offsets and to drive their
data onto the same DOUT line, just in a different slot. For incoming data, the codec simply ignores data on the
bus except where it is expected based on the programmed offset.
Note that the location of the data when an offset is programmed is different, depending on what transfer mode is
selected. In DSP mode, both left and right channels of data are transferred immediately adjacent to each other
in the frame. This differs from left-justified mode, where the left and right channel data will always be a
half-frame apart in each frame. In this case, as the offset is programmed from zero to some higher value, both
the left and right channel data move across the frame, but still stay a full half-frame apart from each other. This
is depicted in Figure 23 for the two cases.
Figure 23. DSP Mode and Left Justified Modes, Showing the
Effect of a Programmed Data Word Offset
21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLV320AIC33IGQER | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IGQE | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IRGZR | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| TLV320AIC33IZQER | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IZQE | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV320AIC32IRHBG4 | 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 32BIT 32QFN EP - Rail/Tube |
| TLV320AIC32IRHBR | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC32IRHBRG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC32IRHBT | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC32IRHBTG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。