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參數資料
型號: TLV320AIC32IRHB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, PLASTIC, QFN-32
文件頁數: 21/76頁
文件大小: 1124K
代理商: TLV320AIC32IRHB
www.ti.com
LB1
RB2
Atten
LB2
L
R
TOLEFTCHANNEL
TO RIGHT CHANNEL
DIGITAL INTERPOLATION FILTER
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
Table 2. Default Digital Effects Processing Filter Coefficients,
When in Independent Channel Processing Configuration
Coefficients
N0 = N3
N1 = N4
N2 = N5
D1 = D4
D2=D5
27619
-27034
26461
32131
-31506
The digital processing also includes capability to implement 3-D processing algorithms by providing means to
process the mono mix of the stereo input, and then combine this with the individual channel signals for stereo
output playback. The architecture of this processing mode, and the programmable filters available for use in the
system, is shown in Figure 27. Note that the programmable attenuation block provides a method of adjusting the
level of 3-D effect introduced into the final stereo output. This combined with the fully programmable biquad
filters in the system enables the user to fully optimize the audio effects for a particular system and provide
extensive differentiation from other systems using the same device.
Figure 27. Architecture of the Digital Audio Processing When 3-D Effects are Enabled
It is recommended that the digital effects filters should be disabled while the filter coefficients are being modified.
While new coefficients are being written to the device over the control port, it is possible that a filter using
partially updated coefficients may actually implement an unstable system and lead to oscillation or objectionable
audio output. By disabling the filters, changing the coefficients, and then re-enabling the filters, these types of
effects can be entirely avoided.
The digital interpolation filter upsamples the output of the digital audio processing block by the required
oversampling ratio before data is provided to the digital delta-sigma modulator and analog reconstruction filter
stages. The filter provides a linear phase output with a group delay of 21/Fs. In addition, programmable digital
interpolation filtering is included to provide enhanced image filtering and reduce signal images caused by the
upsampling process that are below 20 kHz. For example, upsampling an 8-kHz signal produces signal images at
multiples of 8-kHz (i.e., 8 kHz, 16 kHz, 24 kHz, etc.). The images at 8 kHz and 16 kHz are below 20 kHz and still
audible to the listener; therefore, they must be filtered heavily to maintain a good quality output. The interpolation
filter is designed to maintain at least 65-dB rejection of images that land below 7.455 Fs. In order to utilize the
programmable interpolation capability, the Fsref should be programmed to a higher rate (restricted to be in the
range of 39 kHz to 53 kHz when the PLL is in use), and the actual Fs is set using the NDAC divider. For
example, if Fs = 8 kHz is required, then Fsref can be set to 48 kHz, and the DAC Fs set to Fsref/6. This ensures
that all images of the 8-kHz data are sufficiently attenuated well beyond a 20-kHz audible frequency range.
28
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TLV320AIC33IGQER SPECIALTY CONSUMER CIRCUIT, PBGA80
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