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參數(shù)資料
| 型號(hào)： | TMDS442PNPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, TQFP-128 |
| 文件頁數(shù)： | 18/45頁 |
| 文件大小： | 1977K |
| 代理商： | TMDS442PNPRG4 |
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SCL
SDA
DataLine
Stable;
DataValid
ChangeofData Allowed
Start
Condition
ClockPulsefor
Acknowledgement
Acknowledge
Not Acknowledge
DataOutput
byReceiver
DataOutput
byTransmitter
SCL From
Master
S
1
2
8
9
SCL
SDA
MSB
Slave Address
Data
Stop
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Acknowledge
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
Figure 24. I2C Bit Transfer
Figure 25. I2C Acknowledge
Figure 26. I2C Address and Data Cycles
During a write cycle, the transmitting device must not drive the SDA signal line during the acknowledge cycle so
that the receiving device may drive the SDA signal low. After each byte transfer following the address byte, the
receiving device will pull the SDA line low for one SCL clock cycle. A stop condition will be initiated by the
transmitting device after the last byte is transferred. An example of a write cycle can be found in Figure 27 and
Figure 28. Note that the TMDS442 does not allow multiple write transfers to occur. See Example – Writing to the
TMDS442 section for more information.
During a read cycle, the slave receiver will acknowledge the initial address byte if it decodes the address as its
address. Following this initial acknowledge by the slave, the master device becomes a receiver and
Copyright 2006–2007, Texas Instruments Incorporated
25
Product Folder Link(s): TMDS442
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