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參數(shù)資料
| 型號： | TMDS442PNPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, TQFP-128 |
| 文件頁數(shù)： | 43/45頁 |
| 文件大小： | 1977K |
| 代理商： | TMDS442PNPRG4 |
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
THERMAL CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
VCC Supply voltage range
(2)
–0.5 V to 4 V
Aim*, Bim
2.5 V to 4 V
Voltage range
Yjm, Zjm, , Vsadjj, HPDi, 5V_SINKj, LC_SCL, LC_SDA, LC_A0, LC_A1, GE, GPIO
–0.5V to 4 V
SCLi, SCL_SINKj, SDAi, SDA_SINKj, HPD_SINKj, 5V_PWRi
–0.5 V to 6 V
Aim, Bim
±6 kV
Human body model(3)
All pins
±5 kV
Electrostatic discharge
Charged-device model(4) (all pins)
±1500 V
Machine model (5) (all pins)
±200 V
See Dissipation
Continuous power dissipation
Rating Table
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3)
Tested in accordance with JEDEC Standard 22, Test Method A114-B
(4)
Tested in accordance with JEDEC Standard 22, Test Method C101-A
(5)
Tested in accordance with JEDEC Standard 22, Test Method A115-A
DERATING FACTOR (1)
TA = 70°C
PACKAGE
PCB JEDEC STANDARD
TA ≤ 25°C
ABOVE TA = 25°C
POWER RATING
128-TQFP PNP
Low-K(2)
2129.47 mW
21.2947 mW/
°C
1171.20 mW
128-TQFP PNP
High-K(3)
4308.48 mW
43.0848 mW/
°C
2369.66 mW
(1)
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
(2)
In accordance with the Low-K thermal metric definitions of EIA/JESD51-3
(3)
In accordance with the High-K thermal metric definitions of EIA/JESD51-7
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RθJB
Junction-to-board thermal resistance
7.86
°C/W
RθJC
Junction- to-case thermal resistance
19.5
°C/W
VIH = VCC, VIL = VCC - 0.6 V, RT = 50 , AVCC = 3.3 V,
VCC = 3.6 V, RVSADJ = 4.6 k, PRE = Low or high
PD
Device power dissipation
1431
mW
Ai/Bi(2:4)= 1.65 Gbps HDMI data pattern,
Ai/Bi(1) = 165 MHz clock
MIN
NOM
MAX
UNIT
VCC
Supply voltage
3
3.3
3.6
V
TA
Operating free-air temperature
0
70
°C
TMDS DIFFERENTIAL PINS (A/B)
VIC
Input common mode voltage
VCC–400
VCC+10
mV
VID
Receiver peak-to-peak differential input voltage
150
1560
mVp-p
RVSADJ
Resistor for TMDS compliant voltage swing range
4.6
4.64
4.68
k
AVCC
TMDS Output termination voltage, see Figure 3
3
3.3
3.6
V
RT
Termination resistance, see Figure 3
45
50
55
Signaling rate
0
2.25
Gbps
CONTROL PINS (LC_A0, LC_A1, GE, GPIO)
VIH
LVTTL High-level input voltage
2
VCC
V
Copyright 2006–2007, Texas Instruments Incorporated
7
Product Folder Link(s): TMDS442
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