- 您現在的位置：買賣IC網 > PDF目錄382648 > TMX320F2810PBKAEP (Texas Instruments, Inc.) Digital Signal Processors PDF資料下載
參數資料
| 型號： | TMX320F2810PBKAEP |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | Digital Signal Processors |
| 中文描述： | 數字信號處理器 |
| 文件頁數： | 31/103頁 |
| 文件大小： | 1341K |
| 代理商： | TMX320F2810PBKAEP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
–
APRIL 2001
–
REVISED SEPTEMBER 2001
31
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
XINTCNF2 register
Table 15. XINTCNF2 Register Bit Definitions
BITS
TYPE
NAME
RESET
DESCRIPTION
1,0
R/W
Write
Buffer
Depth
0,0
The write buffer allows the processor to continue execution without waiting for
XINTF write accesses to complete. The write buffer depth is selectable as follows:
Depth
Action
00
No write buffering. The CPU will be stalled until the write
completes on the XINTF.
Note:
Default mode on reset (XRS).
01
The XINTF will buffer one word. The CPU is stalled until the
write cycle begins on the XINTF (there could be a read cycle
currently active on the XINTF).
10
One write will be buffered without stalling the CPU. The CPU
is stalled if a second write follows. The CPU will be stalled
until the first write begins its cycle on the XINTF.
11
Two writes will be buffered without stalling the CPU. The CPU
is stalled if a third write follows. The CPU will be stalled until
the first write begins its cycle on the XINTF.
The buffered access can be 8, 16, or 32 bits in length. Order of execution is
preserved, e.g., writes are performed in the order they were accepted. The
processor is stalled on XINTF reads until all pending writes are done and the read
access completes. If the buffer is full, any pending reads or writes to the buffer
will stall the processor.
The
“
Write Buffer Depth
”
can be changed; however, it is recommended that the
write buffer depth be changed only when the buffer is empty (this can be checked
by reading the
“
Write Buffer Level
”
bits). Writing to these bits when the level is not
zero may have unpredictable results.
2
R/W
CLKMODE
Mode
1
XCLKOUT divide by 2 mode. If this bit is set to 1, XCLKOUT is a divide by 2 of
XTIMCLK. If this bit is set to 0, XCLKOUT is equal to XTIMCLK. All bus timings,
irrespective of which mode is enabled, will start from the rising edge of XCLKOUT.
The default mode of operation on power up and reset is /2 mode.
3
R/W
CLKOFF
0
Turn XCLKOUT off mode. When this bit is set to 1, the XCLKOUT signal is turned
off. This is done for power savings and noise reduction. This bit is set to 0 on a
reset.
4
R
Reserved
1
Reserved
5
R
Reserved
0
Reserved
P
相關PDF資料 |
PDF描述 |
|---|---|
| TMP320F2810PBKAEP | Digital Signal Processors |
| TMX320F2810PBKS | DIGITAL SIGNAL PROCESSORS |
| TMP320F2810PBKS | DIGITAL SIGNAL PROCESSORS |
| TMP320F2810GHHA | DIGITAL SIGNAL PROCESSORS |
| TMX320F2810GHHMEP | Digital Signal Processors |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TMX320F2810PBKS | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFAEP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processors |
| TMX320F2810PGFS | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2811GHHA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS320R2811, TMS320R2812 Digital Signal Processors |
發布緊急采購，3分鐘左右您將得到回復。