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參數資料
型號: TS8388BVF
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
封裝: CERAMIC, QFP-68
文件頁數: 47/62頁
文件大小: 1267K
代理商: TS8388BVF
51
0860E–BDC–05/07
e2v semiconductors SAS 2007
TS8388B
10.5.1.22
(TR) Rise Time
Time delay for the output DATA signals to rise from 20% to 80% of delta between low level and high
level.
10.5.1.23
(TF) Fall Time
Time delay for the output DATA signals to fall from 80% to 20% of delta between low level and high level.
10.5.1.24
(PSRR) Power Supply Rejection Ratio
Ratio of input offset variation to a change in power supply voltage.
10.5.1.25
(NRZ) Non Return to Zero
When the input signal is larger than the upper bound of the ADC input range, the output code is identical
to the maximum code and the Out of Range bit is set to logic one. When the input signal is smaller than
the lower bound of the ADC input range, the output code is identical to the minimum code, and the Out of
range bit is set to logic one. (It is assumed that the input signal amplitude remains within the absolute
maximum ratings).
10.5.1.26
(IMD) Intermodulation Distortion
The two tones intermodulation distortion (IMD) rejection is the ratio of either input tone to the worst third
order intermodulation products. The input tones levels are at 7 dB Full Scale.
10.5.1.27
(NPR) Noise Power Ratio
The NPR is measured to characterize the ADC performance in response to broad bandwidth signals.
When using a notch-filtered broadband white-noise generator as the input to the ADC under test, the
Noise Power Ratio is defined as the ratio of the average out-of-notch to the average in-notch power
spectral density magnitudes for the FFT spectrum of the ADC output sample test.
相關PDF資料
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TS8388BMFS9NC3 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
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