欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: TSB12C01APZ
廠商: Texas Instruments, Inc.
英文描述: High-Speed Serial-Bus Link-Layer Controller
中文描述: 高速串行總線鏈路層控制器
文件頁數: 37/59頁
文件大小: 275K
代理商: TSB12C01APZ
4–7
4.5
The format of the CycleMark data is shown in Figure 4–8. The receiver module inserts a single quadlet to
mark the end of an isochronous cycle. The quadlet is inserted into the receive-FIFO.
CycleMark
0
1 2
3
4
5 6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CyDne
Figure 4–8. CycleMark Format
Table 4–8. CycleMark Functions
FIELD NAME
DESCRIPTION
CyDne
This field indicates the end of an isochronous cycle.
4.6
The format of the phy configuration packet is shown in Figure 4–9. The phy configuration packet transmit
contains two quadlets, which are loaded into the ATF. The first quadlet is written to address 80h. The second
quadlet is written to address 8Ch. The 00E0h in the first quadlet tells the TSB12C01A that this is the phy
configuration packet. The Eh is then replaced with 0h before the packet is transmitted to the phy interface.
Phy Configuration
There is a possibility of a false header error on receipt of a phy configuration packet. If the first 16 bits of
a phy configuration packet (see Figure 4–9) happen to match the destination identifier of a node (bus
number and node number), the TSB12C01A on that node issues a header error since the node misinterprets
the phy configuration packet as a data packet addressed to the node. The suggested solution to this
potential problem is to assign bus numbers that all have the MS bit set to 1. Since the all-ones case is
reserved for addressing the local bus, this leaves only 511 available unique bus identifiers. This is an artifact
of the IEEE 1394-1995 standard.
0
1 2
3
4
5 6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
logical inverse of first 16 bits of first quadlet
root_ID
gap_cnt
0
0
R T
1
1
1
0
0
0
0
0
0
0
0
0 0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1 1
1
1
1
Figure 4–9. Phy Configuration Format
相關PDF資料
PDF描述
TSB12C01AWN High-Speed Serial-Bus Link-Layer Controller
TSB12LV01APZ High-Speed Serial-Bus Link-Layer Controller
TSB3055 IC APEX 20KE FPGA 300K 240-PQFP
TSB41AB3 IC APEX 20KE FPGA 400K 672-FBGA
TSB41BA3-EP IC APEX 20KE FPGA 400K 672-FBGA
相關代理商/技術參數
參數描述
TSB12C01AWN 制造商:TI 制造商全稱:Texas Instruments 功能描述:High-Speed Serial-Bus Link-Layer Controller
TSB12LV01A 制造商:Texas Instruments 功能描述:
TSB12LV01AIPZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 (Firewire) Bus Interface/Controller
TSB12LV01APZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:High-Speed Serial-Bus Link-Layer Controller
TSB12LV01B 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 HIGH SPEED SERIAL BUS LINK LAYER CONTROLLER
主站蜘蛛池模板: 苍梧县| 南华县| 司法| 手游| 东乌珠穆沁旗| 霍林郭勒市| 安康市| 孟连| 西昌市| 五原县| 彭山县| 凉城县| 高清| 安康市| 河池市| 贡嘎县| 阿合奇县| 长岭县| 涿州市| 永年县| 盈江县| 自贡市| 伊金霍洛旗| 江阴市| 虎林市| 封丘县| 巴中市| 郯城县| 拉萨市| 清水县| 柯坪县| 台北县| 大港区| 涟源市| 和政县| 闵行区| 朝阳区| 保山市| 宿州市| 曲麻莱县| 鄄城县|