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參數資料
| 型號： | U6264AS1A07 |
| 英文描述： | x8 SRAM |
| 中文描述： | x8的SRAM |
| 文件頁數： | 2/8頁 |
| 文件大?。?/td> | 82K |
| 代理商： | U6264AS1A07 |
2
November 01, 2001
U6264ASA07
Block Diagram
*H or L
Operating Mode
E1
E2
W
G
DQ0 - DQ7
Standby/not
selected
*
L
*
*
High-Z
H
*
*
*
High-Z
Internal Read
L
H
H
H
High-Z
Read
L
H
H
L
Data Outputs, Low-Z
Write
L
H
L
*
Data Inputs, High-Z
Truth Table
Maximum Ratings
Symbol
Min.
Max.
Unit
Power Supply Voltage
V
CC
-0.3
7
V
Input Voltage
V
I
-0.3
V
CC
+ 0.5
V
Output Voltage
V
O
-0.3
V
CC
+ 0.5
V
Power Dissipation
P
D
1
W
Operating Temperature
T
a
-40
125
°
C
Storage Temperature
T
stg
-65
150
°
C
Characteristics
All voltages are referenced to V
SS
= 0 V (ground).
All characteristics are valid in the power supply voltage range and in the operating temperature range specified.
Dynamic measurements are based on a rise and fall time of
≤
5 ns, measured between 10 % and 90 % of V
I
, as well as
input levels of V
IL
= 0 V and V
IH
= 3 V. The timing reference level of all input and output signals is 1.5 V,
with the exception of the t
dis
-times, in which cases transition is measured
±
200 mV from steady-state voltage.
A0
A1
A2
A3
A10
Address
Change
Detector
Memory Cell
Array
256 Rows x
256 Columns
R
R
I
C
C
Sense Amplifier/
Write Control Logic
Clock
Generator
1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
E2
E1
C
I
V
CC
V
SS
W
G
A4
A5
A6
A7
A8
A9
A11
A12
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相關代理商/技術參數 |
參數描述 |
|---|---|
| U6264AS1C07 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 8K X 8 SRAM |
| U6264AS1C07L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 8K X 8 SRAM |
| U6264AS1C07LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 8K X 8 SRAM |
| U6264AS1C10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 8K X 8 SRAM |
| U6264AS1C10L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 8K X 8 SRAM |
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